User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 59
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Figure 8.4. Memory scatter-gather example
Copy from A in
memory, to Alternate
Request
1. Configure primary to enable the copy A, B, C, and D operations: cycle_ctrl = b100, 2
R
= 4, N = 16.
Task A
Task B
Auto request
dm a_done[C]
Copy from B in
memory, to Alternate
Auto request
Auto request
Auto
request
Auto
request
Auto
request
Copy from C in
memory, to Alternate
Task C
Copy from D in
memory, to Alternate
Task D
Data for Task A cycle_ctrl = b101, 2
R
= 4, N = 3
cycle_ctrl = b101, 2
R
= 2, N = 8
cycle_ctrl = b101, 2
R
= 8, N = 5
cycle_ctrl = b010, 2
R
= 4, N = 4
src_data_end_pt r dst_data_end_ptr channel_cfg Unused
0x0A000000 0x0AE00000
0x0B000000 0x0BE00000
0x0C000000 0x0CE00000
0x0D000000 0x0DE00000
0xXXXXXXXX
0xXXXXXXXX
0xXXXXXXXX
Data for Task B
Data for Task C
Data for Task D
Mem ory scatter-gather transaction:
Initialization:
Auto
request
Auto
request
Auto
request
Auto
request
Prim ary Alternat e
N = 3, 2
R
= 4
N = 8, 2
R
= 2
N = 5, 2
R
= 8
N = 4, 2
R
= 4
2. Write the primary source data to memory, using the structure shown in the following table.
0xXXXXXXXX
In Figure 8.4 (p. 59) :
Initialization 1. The host processor configures the primary data structure to operate in memory
scatter-gather mode by setting cycle_ctrl to b100. Because a data structure for a
single channel consists of four words then you must set 2
R
to 4. In this example,
there are four tasks and therefore N is set to 16.
2. The host processor writes the data structure for tasks A, B, C, and D to the
memory locations that the primary src_data_end_ptr specifies.
3. The host processor enables the channel.
The memory scatter-gather transaction commences when the controller receives a request on
dma_req[ ] or a manual request from the host processor. The transaction continues as follows:
Primary, copy A 1. After receiving a request, the controller performs four DMA transfers. These
transfers write the alternate data structure for task A.
2. The controller generates an auto-request for the channel and then arbitrates.
Task A 3. The controller performs task A. After it completes the task, it generates an
auto-request for the channel and then arbitrates.
Primary, copy B 4. The controller performs four DMA transfers. These transfers write the alternate
data structure for task B.
5. The controller generates an auto-request for the channel and then arbitrates.
Task B 6. The controller performs task B. After it completes the task, it generates an
auto-request for the channel and then arbitrates.
Primary, copy C 7. The controller performs four DMA transfers. These transfers write the alternate
data structure for task C.