User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 577
www.energymicro.com
22.5.15 BURTC_FREEZE - Freeze Register
Offset Bit Position
0x038
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
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11
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9
8
7
6
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4
3
2
1
0
Reset
0
Access
RW
Name
REGFREEZE
Bit Name Reset Access Description
31:1 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0 REGFREEZE 0 RW Register Update Freeze
When set, the update of the BURTC is postponed until this bit is cleared. Use this bit to update several registers simultaneously.
Value Mode Description
0 UPDATE Each write access to an BURTC register is updated into the Low Frequency domain
as soon as possible.
1 FREEZE The BURTC is not updated with the new written value until the freeze bit is cleared.
22.5.16 BURTC_SYNCBUSY - Synchronization Busy Register
Offset Bit Position
0x03C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
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14
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12
11
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9
8
7
6
5
4
3
2
1
0
Reset
0
0
Access
R
R
Name
COMP0
LPMODE
Bit Name Reset Access Description
31:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1 COMP0 0 R BURTC_COMP0 Register Busy
Set when the value written to BURTC_COMP0 is being synchronized.
0 LPMODE 0 R BURTC_LPMODE Register Busy
Set when the value written to BURTC_LPMODE is being synchronized.
22.5.17 RETx_REG - Retention register
Offset Bit Position
0x100
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
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9
8
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5
4
3
2
1
0
Reset
0xXXXXXXXX
Access
RW
Name
REG