User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 573
www.energymicro.com
Bit Name Reset Access Description
31:9 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
8:4 TOP 0x00 RW LFXO failure counter top value.
LFXO failure counter will wrap to this value when reaching zero.
3:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1:0 OSC 0x0 RW LFXO failure detection configuration.
Select oscillator for LFXO failure detection.
Value Mode Description
0 DISABLE LFXO failure detection disabled.
1 LFRCO LFRCO used for LFXO failure detection.
2 ULFRCO ULFRCO used for LFXO failure detection.
22.5.7 BURTC_STATUS - Backup domain status
Offset Bit Position
0x018
31
30
29
28
27
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25
24
23
22
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4
3
2
1
0
Reset
0
0
0
Access
R
R
R
Name
RAMWERR
BUMODETS
LPMODEACT
Bit Name Reset Access Description
31:3 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
2 RAMWERR 0 R RAM write error.
Set if backup mode is entered during a write to the retention RAM.
1 BUMODETS 0 R Timestamp for backup mode entry stored.
Set when a timestamp has been stored in BURTC_TIMESTAMP.
0 LPMODEACT 0 R Low power mode active
Set when the BURTC is in low power mode
22.5.8 BURTC_CMD - Command Register
Offset Bit Position
0x01C
31
30
29
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27
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25
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4
3
2
1
0
Reset
0
Access
W1
Name
CLRSTATUS
Bit Name Reset Access Description
31:1 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0 CLRSTATUS 0 W1 Clear BURTC_STATUS register.