User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 569
www.energymicro.com
22.4 Register Map
The offset register address is relative to the registers base address.
Offset Name Type Description
0x000 BURTC_CTRL RW Control Register
0x004 BURTC_LPMODE RW Low power mode configuration
0x008 BURTC_CNT R Counter Value Register
0x00C BURTC_COMP0 RW Counter Compare Value
0x010 BURTC_TIMESTAMP R Backup mode timestamp
0x014 BURTC_LFXOFDET RW LFXO
0x018 BURTC_STATUS R Backup domain status
0x01C BURTC_CMD W1 Command Register
0x020 BURTC_POWERDOWN RW Retention RAM power-down resgister
0x024 BURTC_LOCK RW Configuration Lock Register
0x028 BURTC_IF R Interrupt Flag Register
0x02C BURTC_IFS W1 Interrupt Flag Set Register
0x030 BURTC_IFC W1 Interrupt Flag Clear Register
0x034 BURTC_IEN RW Interrupt Enable Register
0x038 BURTC_FREEZE RW Freeze Register
0x03C BURTC_SYNCBUSY R Synchronization Busy Register
0x100 RET0_REG RW Retention register
... RETx_REG RW Retention register
0x2FC RET127_REG RW Retention register
22.5 Register Description
22.5.1 BURTC_CTRL - Control Register
Offset Bit Position
0x000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0x0
0x0
0x0
0
1
0
0x0
Access
RW
RW
RW
RW
RW
RW
RW
RW
Name
BUMODETSEN
CLKSEL
PRESC
LPCOMP
COMP0TOP
RSTEN
DEBUGRUN
MODE
Bit Name Reset Access Description
31:15 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
14 BUMODETSEN 0 RW Backup mode timestamp enable
When set, the BURTC will store its counter value in the BURTC_TIMESTAMP register upon backup mode entry.
13:12 CLKSEL 0x0 RW Select BURTC clock source
Value Mode Description
0 NONE No clock source selected for BURTC.