User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 543
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Bit Name Reset Access Description
31:11 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
10 ICBOF2 0 R CC Channel 2 Input Capture Buffer Overflow Interrupt Flag
This bit indicates that a new capture value has pushed an unread value out of the TIMERn_CC2_CCV/TIMERn_CC2_CCVB register
pair.
9 ICBOF1 0 R CC Channel 1 Input Capture Buffer Overflow Interrupt Flag
This bit indicates that a new capture value has pushed an unread value out of the TIMERn_CC1_CCV/TIMERn_CC1_CCVB register
pair.
8 ICBOF0 0 R CC Channel 0 Input Capture Buffer Overflow Interrupt Flag
This bit indicates that a new capture value has pushed an unread value out of the TIMERn_CC0_CCV/TIMERn_CC0_CCVB register
pair.
7 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
6 CC2 0 R CC Channel 2 Interrupt Flag
This bit indicates that there has been an interrupt event on Compare/Capture channel 2.
5 CC1 0 R CC Channel 1 Interrupt Flag
This bit indicates that there has been an interrupt event on Compare/Capture channel 1.
4 CC0 0 R CC Channel 0 Interrupt Flag
This bit indicates that there has been an interrupt event on Compare/Capture channel 0.
3:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1 UF 0 R Underflow Interrupt Flag
This bit indicates that there has been an underflow.
0 OF 0 R Overflow Interrupt Flag
This bit indicates that there has been an overflow.
20.5.6 TIMERn_IFS - Interrupt Flag Set Register
Offset Bit Position
0x014
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
Access
W1
W1
W1
W1
W1
W1
W1
W1
Name
ICBOF2
ICBOF1
ICBOF0
CC2
CC1
CC0
UF
OF
Bit Name Reset Access Description
31:11 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
10 ICBOF2 0 W1 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set
Writing a 1 to this bit will set Compare/Capture channel 2 input capture buffer overflow interrupt flag.
9 ICBOF1 0 W1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set
Writing a 1 to this bit will set Compare/Capture channel 1 input capture buffer overflow interrupt flag.
8 ICBOF0 0 W1 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set
Writing a 1 to this bit will set Compare/Capture channel 0 input capture buffer overflow interrupt flag.
7 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
6 CC2 0 W1 CC Channel 2 Interrupt Flag Set
Writing a 1 to this bit will set Compare/Capture channel 2 interrupt flag.
5 CC1 0 W1 CC Channel 1 Interrupt Flag Set