User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 539
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Bit Name Reset Access Description
Value Mode Description
2 STOP Stop counter without reload
3 RELOADSTART Reload and start counter
9:8 RISEA 0x0 RW Timer Rising Input Edge Action
These bits select the action taken in the counter when a rising edge occurs on the input.
Value Mode Description
0 NONE No action
1 START Start counter without reload
2 STOP Stop counter without reload
3 RELOADSTART Reload and start counter
7 DMACLRACT 0 RW DMA Request Clear on Active
When this bit is set, the DMA requests are cleared when the corresponding DMA channel is active. This enables the timer DMA
requests to be cleared without accessing the timer.
6 DEBUGRUN 0 RW Debug Mode Run Enable
Set this bit to enable timer to run in debug mode.
Value Description
0 Timer is frozen in debug mode
1 Timer is running in debug mode
5 QDM 0 RW Quadrature Decoder Mode Selection
This bit sets the mode for the quadrature decoder.
Value Mode Description
0 X2 X2 mode selected
1 X4 X4 mode selected
4 OSMEN 0 RW One-shot Mode Enable
Enable/disable one shot mode.
3 SYNC 0 RW Timer Start/Stop/Reload Synchronization
When this bit is set, the Timer is started/stopped/reloaded by start/stop/reload commands in the other timers
Value Description
0 Timer is not started/stopped/reloaded by other timers
1 Timer is started/stopped/reloaded by other timers
2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1:0 MODE 0x0 RW Timer Mode
These bit set the counting mode for the Timer. Note, when Quadrature Decoder Mode is selected (MODE = 'b11), the CLKSEL is
don't care. The Timer is clocked by the Decoder Mode clock output.
Value Mode Description
0 UP Up-count mode
1 DOWN Down-count mode
2 UPDOWN Up/down-count mode
3 QDEC Quadrature decoder mode