User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 517
www.energymicro.com
Bit Name Reset Access Description
Set when the value written to LEUARTn_TXDATA is being synchronized.
5 TXDATAX 0 R LEUARTn_TXDATAX Register Busy
Set when the value written to LEUARTn_TXDATAX is being synchronized.
4 SIGFRAME 0 R LEUARTn_SIGFRAME Register Busy
Set when the value written to LEUARTn_SIGFRAME is being synchronized.
3 STARTFRAME 0 R LEUARTn_STARTFRAME Register Busy
Set when the value written to LEUARTn_STARTFRAME is being synchronized.
2 CLKDIV 0 R LEUARTn_CLKDIV Register Busy
Set when the value written to LEUARTn_CLKDIV is being synchronized.
1 CMD 0 R LEUARTn_CMD Register Busy
Set when the value written to LEUARTn_CMD is being synchronized.
0 CTRL 0 R LEUARTn_CTRL Register Busy
Set when the value written to LEUARTn_CTRL is being synchronized.
19.5.19 LEUARTn_ROUTE - I/O Routing Register
Offset Bit Position
0x054
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0
0
0
Access
RW
RW
RW
Name
LOCATION
TXPEN
RXPEN
Bit Name Reset Access Description
31:11 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
10:8 LOCATION 0x0 RW I/O Location
Decides the location of the LEUART I/O pins.
Value Mode Description
0 LOC0 Location 0
1 LOC1 Location 1
2 LOC2 Location 2
3 LOC3 Location 3
4 LOC4 Location 4
7:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1 TXPEN 0 RW TX Pin Enable
When set, the TX pin of the LEUART is enabled.
Value Description
0 The LEUn_TX pin is disabled
1 The LEUn_TX pin is enabled
0 RXPEN 0 RW RX Pin Enable
When set, the RX pin of the LEUART is enabled.
Value Description
0 The LEUn_RX pin is disabled
1 The LEUn_RX pin is enabled