User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 488
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Bit Name Reset Access Description
Set to enable filter on IrDA demodulator.
Value Description
0 No filter enabled
1 Filter enabled. IrDA pulse must be high for at least 4 consecutive clock cycles to be detected
2:1 IRPW 0x0 RW IrDA TX Pulse Width
Configure the pulse width generated by the IrDA modulator as a fraction of the configured USART bit period.
Value Mode Description
0 ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1
1 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1
2 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1
3 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1
0 IREN 0 RW Enable IrDA Module
Enable IrDA module and rout USART signals through it.
17.5.22 USARTn_ROUTE - I/O Routing Register
Offset Bit Position
0x054
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0
0
0
0
0
Access
RW
RW
RW
RW
RW
Name
LOCATION
CLKPEN
CSPEN
TXPEN
RXPEN
Bit Name Reset Access Description
31:11 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
10:8 LOCATION 0x0 RW I/O Location
Decides the location of the USART I/O pins.
Value Mode Description
0 LOC0 Location 0
1 LOC1 Location 1
2 LOC2 Location 2
3 LOC3 Location 3
4 LOC4 Location 4
5 LOC5 Location 5
7:4 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
3 CLKPEN 0 RW CLK Pin Enable
When set, the CLK pin of the USART is enabled.
Value Description
0 The USn_CLK pin is disabled
1 The USn_CLK pin is enabled
2 CSPEN 0 RW CS Pin Enable
When set, the CS pin of the USART is enabled.
Value Description
0 The USn_CS pin is disabled
1 The USn_CS pin is enabled