User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 485
www.energymicro.com
17.5.18 USARTn_IFS - Interrupt Flag Set Register
Offset Bit Position
0x044
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
0
0
0
Access
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
Name
CCF
SSM
MPAF
FERR
PERR
TXUF
TXOF
RXUF
RXOF
RXFULL
TXC
Bit Name Reset Access Description
31:13 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
12 CCF 0 W1 Set Collision Check Fail Interrupt Flag
Write to 1 to set the CCF interrupt flag.
11 SSM 0 W1 Set Slave-Select in Master mode Interrupt Flag
Write to 1 to set the SSM interrupt flag.
10 MPAF 0 W1 Set Multi-Processor Address Frame Interrupt Flag
Write to 1 to set the MPAF interrupt flag.
9 FERR 0 W1 Set Framing Error Interrupt Flag
Write to 1 to set the FERR interrupt flag.
8 PERR 0 W1 Set Parity Error Interrupt Flag
Write to 1 to set the PERR interrupt flag.
7 TXUF 0 W1 Set TX Underflow Interrupt Flag
Write to 1 to set the TXUF interrupt flag.
6 TXOF 0 W1 Set TX Overflow Interrupt Flag
Write to 1 to set the TXOF interrupt flag.
5 RXUF 0 W1 Set RX Underflow Interrupt Flag
Write to 1 to set the RXUF interrupt flag.
4 RXOF 0 W1 Set RX Overflow Interrupt Flag
Write to 1 to set the RXOF interrupt flag.
3 RXFULL 0 W1 Set RX Buffer Full Interrupt Flag
Write to 1 to set the RXFULL interrupt flag.
2:1 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0 TXC 0 W1 Set TX Complete Interrupt Flag
Write to 1 to set the TXC interrupt flag.
17.5.19 USARTn_IFC - Interrupt Flag Clear Register
Offset Bit Position
0x048
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
0
0
0
Access
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
Name
CCF
SSM
MPAF
FERR
PERR
TXUF
TXOF
RXUF
RXOF
RXFULL
TXC