User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 481
www.energymicro.com
17.5.12 USARTn_RXDOUBLEXP - RX Buffer Double Data Extended Peek
Register
Offset Bit Position
0x02C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
0 0
0x000
0 0
0x000
Access
R R R R R R
Name
FERRP1 PERRP1
RXDATAP1
FERRP0 PERRP0
RXDATAP0
Bit Name Reset Access Description
31 FERRP1 0 R Data Framing Error 1 Peek
Set if data in buffer has a framing error. Can be the result of a break condition.
30 PERRP1 0 R Data Parity Error 1 Peek
Set if data in buffer has a parity error (asynchronous mode only).
29:25 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
24:16 RXDATAP1 0x000 R RX Data 1 Peek
Second frame read from FIFO.
15 FERRP0 0 R Data Framing Error 0 Peek
Set if data in buffer has a framing error. Can be the result of a break condition.
14 PERRP0 0 R Data Parity Error 0 Peek
Set if data in buffer has a parity error (asynchronous mode only).
13:9 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
8:0 RXDATAP0 0x000 R RX Data 0 Peek
First frame read from FIFO.
17.5.13 USARTn_TXDATAX - TX Buffer Data Extended Register
Offset Bit Position
0x030
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
0 0 0 0 0
0x000
Access
W W W W W W
Name
RXENAT
TXDISAT TXBREAK TXTRIAT
UBRXAT
TXDATAX
Bit Name Reset Access Description
31:16 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
15 RXENAT 0 W Enable RX After Transmission
Set to enable reception after transmission.
14 TXDISAT 0 W Clear TXEN After Transmission