User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 413
www.energymicro.com
16 I
2
C - Inter-Integrated Circuit Interface
0
1 2 3 4
EFM32
I
2
C m aster/slave
Other I
2
C
master
Other I
2
C
slave
V
DD
I
2
C
EEPROM
SDA
SCL
Quick Facts
What?
The I
2
C interface allows communication
on I
2
C-buses with the lowest energy
consumption possible.
Why?
I
2
C is a popular serial bus that enables
communication with a number of external
devices using only two I/O pins.
How?
With the help of DMA, the I
2
C interface
allows I
2
C communication with minimal CPU
intervention. Address recognition is available
in all energy modes (except EM4), allowing
the MCU to wait for data on the I
2
C-bus with
sub-µA current consumption.
16.1 Introduction
The I
2
C module provides an interface between the MCU and a serial I
2
C-bus. It is capable of acting as
both a master and a slave, and supports multi-master buses. Both standard-mode, fast-mode and fast-
mode plus speeds are supported, allowing transmission rates all the way from 10 kbit/s up to 1 Mbit/s.
Slave arbitration and timeouts are also provided to allow implementation of an SMBus compliant system.
The interface provided to software by the I
2
C module, allows both fine-grained control of the transmission
process and close to automatic transfers. Automatic recognition of slave addresses is provided in all
energy modes (except EM4).
16.2 Features
• True multi-master capability
• Support for different bus speeds
• Standard-mode (Sm) bitrate up to 100 kbit/s
• Fast-mode (Fm) bitrate up to 400 kbit/s
• Fast-mode Plus (Fm+) bitrate up to 1 Mbit/s
• Arbitration for both master and slave (Allows SMBus ARP)
• Clock synchronization and clock stretching
• Hardware address recognition
• 7-bit masked address
• General call address
• Active in all energy modes (except EM4)
• 10-bit address support
• Error handling
• Clock low timeout
• Clock high timeout
• Arbitration lost
• Bus error detection
• Double buffered data
• Full DMA support