User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 366
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Bit Name Reset Access Description
Value Mode Description
1 GOUTNAK Device mode: Global OUT NAK (triggers an interrupt).
2 PKTRCV Host mode: IN data packet received.
Device mode: OUT data packet received.
3 XFERCOMPL Host mode: IN transfer completed (triggers an interrupt).
Device mode: OUT transfer completed (triggers an interrupt).
4 SETUPCOMPL Device mode: SETUP transaction completed (triggers an interrupt).
5 TGLERR Host mode: Data toggle error (triggers an interrupt).
6 SETUPRCV Device mode: SETUP data packet received.
7 CHLT Host mode: Channel halted (triggers an interrupt).
16:15 DPID 0x0 R Data PID (host or device)
Host mode: Indicates the Data PID of the received packet.
Device mode: Indicates the Data PID of the received OUT data packet.
Value Mode Description
0 DATA0 DATA0 PID.
1 DATA1 DATA1 PID.
2 DATA2 DATA2 PID.
3 MDATA MDATA PID.
14:4 BCNT 0x000 R Byte Count (host or device)
Host mode: Indicates the byte count of the received IN data packet.
Device mode: Indicates the byte count of the received data packet.
3:0 CHEPNUM 0x0 R Channel Number (host only) / Endpoint Number (device only)
Host mode: Indicates the channel number to which the current received packet belongs.
Device mode: Indicates the endpoint number to which the current received packet belongs.
15.6.17 USB_GRXFSIZ - Receive FIFO Size Register
The application can program the RAM size that must be allocated to the RxFIFO.
Offset Bit Position
0x3C024
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x200
Access
RW
Name
RXFDEP
Bit Name Reset Access Description
31:10 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
9:0 RXFDEP 0x200 RW RxFIFO Depth
This value is in terms of 32-bit words. Minimum value is 16. Maximum value is 512.
15.6.18 USB_GNPTXFSIZ - Non-periodic Transmit FIFO Size Register
The application can program the RAM size and the memory start address for the Non-periodic TxFIFO.