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2012-04-24 - Giant Gecko Family - d0053_Rev0.96 342

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5. The application sets the USB_PCGCCTL.STOPPCLK bit.

6. Switch USB Core Clock (USBC) to 32 kHz.

7. Enter EM2.

Device Mode Resume (EM2 -> EM0)

Sequence if operations:

1. The core detects Resume signaling on the USB. The core generates a Resume Detected interrupt.

2. Switch USB Core Clock (USBC) back to 48 MHz.

3. The application clears the STOPPCLK bit.

4. The application clears the USB_PCGCCTL.PWRCLMP and USB_PCGCCTL.RSTPDWNMODULE

bits.

5. Restore the USB_GUSBCFG and USB_DCFG registers with the values stored during the Save

operation before entering EM2.

6. Restore the following core registers with the values stored during the Save operation before entering

EM2:

• USB_GINTMSK

• USB_GOTGCTL

• USB_GUSBCFG

• USB_GRXFSIZ

• USB_GNPTXFSIZ

• USB_DAINTMSK

• USB_DIEPMSK

• USB_DOEPMSK

• USB_DIEPx_CTL

• USB_DIEPx_TSIZ

• USB_DIEPx_DMAADDR

• USB_DIEPTXFn

7. The application programs CSRs, then sets the Power-On Programming Done bit in the Device Control

Device Mode Remote Wakeup (EM2 -> EM0)

Sequence if operations:

1. An interrupt wakes up the device from EM2.

2. Switch USB Core Clock (USBC) back to 48 MHz.

3. The application clears the STOPPCLK and GATEHCLK bits in the USB_PCGCCTL register.

4. The application clears the USB_PCGCCTL.PWRCLMP and USB_PCGCCTL.RSTPDWNMODULE

bits.

5. Restore the USB_GUSBCFG and USB_DCFG registers with the values stored during the Save

operation before entering EM2 .

6. Drive remote wakeup from the core. Program USB_DCTL by performing write-only operation with the

following values:

• USB_DCTL.RMTWKUPSIG = 1

• Other Bits = Value stored during the Save operation before entering EM2

7. Clear all interrupt status. Wait for at least 1 millisecond of remote wakeup time and then program

GINSTS register with 0xFFFFFFFF to clear all the status register fields.

8. Restore the following core registers with the values stored during the Save operation before entering