User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 338
www.energymicro.com
• USB_HPRT.PRTPWR = 1
• USB_HPRT.PRTENA = 0
3. Wait for the USB_HPRT Port Connect Detected (PRTCONNDET) bit to be set and do the enumeration
of Device.
15.4.8.1.2 When the Core is in Device Mode
To make PHY enter low power mode, complete the following steps:
1. Ensure that the following signals are set as follows:
• VBUS voltage level must be below the session valid level (VBUS is not active)
• DP/DM must be SE0
2. From the application, perform read-modify-write operation to set USB_PCGCCTL.STOPPCLK = 1.
15.4.8.2 Suspend
When the core is in Suspend, the following power conservation options are available to use:
• Using EM2 (p. 338) : You can enter EM2, turning off power (and reseting) parts of the core
• Clock Gating (EM0 and EM1) (p. 343) : You can choose gate the AHB clock to some parts of the
core Internal Clock Gating when the Core is in Host Mode (p. 343)
This section discusses methods of conserving power by using one of the above methods.
15.4.8.2.1 Using EM2
15.4.8.2.1.1 Overview of the EM2 Programming Model
When the USB is suspended or the session is not valid, the PHY is driven into Suspend mode,
stopping the PHY clock to reduce power consumption in the PHY and the core. To further reduce power
consumption, the core also supports AHB clock gating and using EM2.
The following sections show the procedures you must follow to use EM2 while in suspend/session-off.
During EM2, the clock to the core must be switched to one of the 32 kHz sources (LFRCO or LFXO).
This core needs this clock to detect Resume and SRP events.
15.4.8.2.1.2 EM2 when the Core is in Host Mode
Host Mode Suspend in EM2
Sequence of operations:
1. Back up the essential registers of the core. Read and store the following core registers:
• USB_GINTMSK
• USB_GOTGCTL
• USB_GAHBCFG
• USB_GUSBCFG
• USB_GRXFSIZ
• USB_GNPTXFSIZ
• USB_DCFG
• USB_DCTL
• USB_DAINTMSK
• USB_DIEPMSK
• USB_DOEPMSK
• USB_DIEPx_CTL
• USB_DIEPx_TSIZ
• USB_DIEPx_DMAADDR
• USB_PCGCCTL
• USB_DIEPTXFn
2. The application sets the Port Suspend bit in the Host Port CSR, and the core drives a USB suspend.