User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 289
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Figure 15.19 (p. 289) charts this flow.
Figure 15.19. Processing a SETUP Packet
Wait for
USB_DOEPx_INT.SETUP
rem_supcnt =
Rd_Reg(USB_DOEPx_TSIZ)
Find setup cm d type
Write
2-stage
Read
No
Back2Back Setup
Interrupt bit set ?
Setup_addr =
Rd_Reg(USB_DOEPx_DMA
Yes
setup_cm d[31:0] = mem[setup_addr-8]
setup_cm d[63:32] = mem [setup_addr-4]
setup_cm d[31:0] = mem[4-2 * rem_supcnt]
setup_cm d[63:32] = mem [5-2 * rem _supcnt]
ctr-rd/wr/2 stage
setup_np_in_pkt
Data IN phase
setup_np_in_pkt
Sata IN phase
rcv_out_pkt
Data OUT phase
15.4.4.2.1.2 Handling More Than Three Back-to-Back SETUP Packets
Per the USB 2.0 specification, normally, during a SETUP packet error, a host does not send more
than three back-to-back SETUP packets to the same endpoint. However, the USB 2.0 specification
does not limit the number of back-to-back SETUP packets a host can send to the same endpoint.
When this condition occurs, the core generates an interrupt (USB_DOEPx_INT.BACK2BACKSETUP).
In DMA mode, the core also rewinds the DMA address for that endpoint (USB_DOEPx_DMAADDR)
and overwrites the first SETUP packet in system memory with the fourth, second with the fifth, and so
on. If the BACK2BACKSETUP interrupt is asserted, the application must read the OUT endpoint DMA
register (USB_DOEPx_DMAADDR) to determine the final SETUP data in system memory.
In DMA mode, the application can mask the BACK2BACKSETUP interrupt, but after receiving the
DOEPINT.SETUP interrupt, the application can read the DOEPINT.BACK2BACKSETUP interrupt bit.
In Slave mode, the application can use the USB_GINTSTS.RXFLVL interrupt to read out the SETUP
packets from the FIFO whenever the core receives the SETUP packet.
15.4.4.2.2 Control Transfers
This section describes the various types of control transfers.