User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 234
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Bit Name Reset Access Description
Value Mode Description
1 ACTIVEHIGH HSYNC is active high.
2 DATAENPOL 0 RW TFT DATAEN Polarity
Sets the polarity of the EBI_DATAEN line.
Value Mode Description
0 ACTIVELOW DATAEN is active low.
1 ACTIVEHIGH DATAEN is active high.
1 DCLKPOL 0 RW TFT DCLK Polarity
Sets the active edge polarity of the EBI_DCLK line.
Value Mode Description
0 ACTIVEFALLING DCLK falling edge is the active edge.
1 ACTIVERISING DCLK rising edge the active edge.
0 CSPOL 0 RW TFT Chip Select Polarity
Sets the polarity of the EBI_CSTFT line.
Value Mode Description
0 ACTIVELOW CSTFT is active low.
1 ACTIVEHIGH CSTFT is active high.
14.5.33 EBI_TFTDD - TFT Direct Drive Data Register
Offset Bit Position
0x080
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0000
Access
RW
Name
DATA
Bit Name Reset Access Description
31:16 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
15:0 DATA 0x0000 RW TFT Direct Drive Data from Internal Memory
Sets the RGB value used when Direct Drive from internal memory is used (DD = INTERNAL)
14.5.34 EBI_TFTALPHA - TFT Alpha Blending Register
Offset Bit Position
0x084
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x000
Access
RW
Name
ALPHA