User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 23
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starting the synchronization process, thus providing precise control of the module update process. The
synchronization process is started by clearing the REGFREEZE bit.
Note
The FREEZE register is also present on peripherals with immediate synchronization, but
there it has no effect
5.4 Flash
The Flash retains data in any state and typically stores the application code, special user data and
security information. The Flash memory is typically programmed through the debug interface, but can
also be erased and written to from software.
• Up to 1024 KB of memory
• Page size of 512 bytes (minimum erase unit)
• Minimum 20K erase cycles endurance
• Greater than 10 years data retention at 85°C
• Lock-bits for memory protection
• Data retention in any state
5.5 SRAM
The primary task of the SRAM memory is to store application data. Additionally, it is possible to execute
instructions from SRAM, and the DMA may be set up to transfer data between the SRAM, Flash and
peripherals.
• Up to 128 KB memory
• Bit-band access support
• 32KB blocks may be individually powered down when not in use
• Data retention of the entire memory in EM0 to EM3, with option of turning off retention in EM2/EM3
5.6 Device Information (DI) Page
The DI page contains calibration values, a unique identification number and other useful data. See the
table below for a complete overview.
Table 5.4. Device Information Table
DI Address Register Description
0x0FE08020 CMU_LFRCOCTRL Register reset value
0x0FE08028 CMU_HFRCOCTRL Register reset value
0x0FE08030 CMU_AUXHFRCOCTRL Register reset value
0x0FE08040 ADC0_CAL Register reset value
0x0FE08048 ADC0_BIASPROG Register reset value
0x0FE08050 DAC0_CAL Register reset value
0x0FE08058 DAC0_BIASPROG Register reset value
0x0FE08060 ACMP0_CTRL Register reset value
0x0FE08068 ACMP1_CTRL Register reset value
0x0FE08078 CMU_LCDCTRL Register reset value
0x0FE080A0 DAC0_OPACTRL Register reset value
0x0FE080A8 DAC0_OPAOFFSET Register reset value