User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 217
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Bit Name Reset Access Description
Value Mode Description
25 A25 EBI_A[24:L] pins enabled.
26 A26 EBI_A[25:L] pins enabled.
27 A27 EBI_A[26:L] pins enabled.
28 A28 EBI_A[27:L] pins enabled.
17:16 ALB 0x0 RW Sets the lower bound for EBI_A enabling
Sets the lower bound of the EBI_A lines which can be enabled in the APEN field.
Value Mode Description
0 A0 Address lines from EBI_A[0] and upwards can be enabled via APEN.
1 A8 Address lines from EBI_A[8] and upwards can be enabled via APEN.
2 A16 Address lines from EBI_A[16] and upwards can be enabled via APEN.
3 A24 Address lines from EBI_A[24] and upwards can be enabled via APEN.
15:13 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
12 NANDPEN 0 RW NANDRE and NANDWE Pin Enable
When set, the NANDREn and NANDWEn Pin pins are enabled
11:8 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
7 BLPEN 0 RW EBI_BL[1:0] Pin Enable
When set, the EBI_BL[1:0] pins are enabled
6 ARDYPEN 0 RW EBI_ARDY Pin Enable
When set, the EBI_ARDY pin is enabled
5 ALEPEN 0 RW EBI_ALE Pin Enable
When set, the EBI_ALE pin is enabled
4 CS3PEN 0 RW EBI_CS3 Pin Enable
When set, the EBI_CS3 pin is enabled
3 CS2PEN 0 RW EBI_CS2 Pin Enable
When set, the EBI_CS2 pin is enabled
2 CS1PEN 0 RW EBI_CS1 Pin Enable
When set, the EBI_CS1 pin is enabled
1 CS0PEN 0 RW EBI_CS0 Pin Enable
When set, the EBI_CS0 pin is enabled
0 EBIPEN 0 RW EBI Pin Enable
When set, the EBI_AD[15:0], EBI_WEn and EBI_REn pins are enabled
14.5.7 EBI_ADDRTIMING1 - Address Timing Register 1
Offset Bit Position
0x018
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0x3
0x3
Access
RW
RW
RW
Name
HALFALE
ADDRHOLD
ADDRSETUP
Bit Name Reset Access Description
31:29 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
28 HALFALE 0 RW Half Cycle ALE Strobe Duration Enable