User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 197
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Figure 14.32. EBI EBI_ECCPARITY Format
P32768 P32768' P16384 P16384' P8192 P8192' P4096 P4096'EBI_ECCPARITY[31:24]
MSB LSB
P2048 P2048' P1024 P1024' P512 P512' P256 P256'EBI_ECCPARITY[23:16]
P128 P128' P64 P64' P32 P32' P16 P16'EBI_ECCPARITY[15:8]
P8 P8' P4 P4' P2 P2' P1 P1'EBI_ECCPARITY[7:0]
Table 14.10. EBI EBI_ECCPARITY valid bits
Number of data bytes used for ECC generation Valid EBI_ECCPARITY bits
256 EBI_ECCPARITY[21:0]
512 EBI_ECCPARITY[23:0]
1024 EBI_ECCPARITY[25:0]
2048 EBI_ECCPARITY[27:0]
4096 EBI_ECCPARITY[29:0]
8192 EBI_ECCPARITY[31:0]
Software can compare, XOR, the parity data generated in EBI_ECCPARITY with the parity information
stored in the spare area for the used data set. The syndrome resulting from XORing the valid
EBI_ECCPARITY bits with the ECC code read from the spare area can be used for error detection and
correction as shown in Table 14.11 (p. 197) .
Table 14.11. EBI Error Detection Result
Error Detection Result Syndrome Interpretation
No Error Syndrome has all valid Pn, Pn' bits 0 No error has been detected
1-bit Correctable Error For all valid syndrome (Pn, Pn') pairs:
Pn = not(Pn')
1 bit in the user main data is incorrect
and it can be corrected. For 8-bit wide
data the position of the incorrect bit is
indicated by bit pattern (P4, P2, P1); the
position of the incorrect byte is indicated
by (..., P32, P16, P8). For 16-bit wide
data the position of the incorrect bit
is (P8, P4, P2, P1); the incorrect byte
number is indicated by (..., P64, P32,
P16)
ECC Error 1 bit of the XOR result is high An error has been detected in the ECC
itself. No error has been detected in the
user data
Uncorrectable Error Other cases Multiple (2 or more) bits are incorrect.
This error cannot be corrected
14.3.16 TFT Direct Drive
TFT Direct Drive can be used to automatically transfer frame data stored in either internal or external
memory to a TFT display without frame buffer. The EBI generates the necessary RGB control signals
for the TFT display and it coordinates and aligns the pixel data transfers accordingly. The Direct Drive
engine is enabled by setting the DD bitfield in the EBI_TFTCTRL register to either INTERNAL or