User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 189
www.energymicro.com
Figure 14.24. EBI Alternative Memory Map (ALTMAP = 1)
EBI Region 0 (32 MB)
Code
0x0 00000 00
0x1 fffffff
EBI Regions
0x8 00000 00
0xbfffffff
0xc0000 000
0xffffffff
0x2 00000 00
0x7 fffffff
0x1 20000 00
EBI Region 1 (32 MB)
EBI Region 2 (32 MB)
0x1 3ffffff
0x1 40000 00
0x1 5ffffff
0x1 60000 00
0x1 7ffffff
0x1 80000 00
0x1 fffffff
EBI Region 3 (128 MB)
EBI Region 0 (256 MB)
0x8 00000 00
EBI Region 2 (256 MB)
EBI Region 1 (256 MB)
0x8 fffffff
0x9 00000 00
0x9 fffffff
0xa00 0000 0
0xafffffff
0xb000 0000
0xbfffffff
EBI Region 3 (256 MB)
0x1 20000 00
14.3.13 WAIT/ARDY.
Some external devices are able to indicate that they are not finished with either write or read operation
by asserting the WAIT / ARDY line. This input signal is used to extend the REn/WEn cycles for slow
devices. The interpretation of the polarity of this signal can be configured with the ARDYPOL bit in
EBI_POLARITY. E.g. if the ARDYPOL is set to ACTIVELOW, then the REn/WEn cycle is extended
while the ARDY line is kept low. The ARDY functionality is enabled by setting the ARDYEN bit in the
EBI_CTRL register. It is also possible to enable a timeout check, which generates a bus error if the ARDY
is not deasserted within the timeout period. This prevents a system lock up condition in the case that the
external device does not deassert ARDY. The timeout functionality is disabled by setting ARDYTODIS
in the EBI_CTRL register.
When the ITS bitfield in the EBI_CTRL register is set to 0, the wait behavior defined in the ARDYEN and
ARDYTODIS bitfields applies to all 4 memory banks. When ITS is set to 1 each memory bank uses an
individual wait behavior definition. In this case bitfields ARDYEN and ARDYTODIS only apply to bank
0. Wait behavior for bank n is then defined in the ARDYnEN and ARDYTOnDIS bitfields.