User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 157
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Bit Name Reset Access Description
This bit enables/disables the VBOOST function.
2:0 FDIV 0x0 RW Frame Rate Control
These bits controls the framerate according to this formula: LFACLK
LCD
= LFACLK
LCDpre
/ (1 + FDIV). Do not change this value while
the LCD bit in CMU_LFACLKEN0 is set to 1.
11.5.27 CMU_ROUTE - I/O Routing Register
Offset Bit Position
0x080
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0
0
0
Access
RW
RW
RW
Name
LOCATION
CLKOUT1PEN
CLKOUT0PEN
Bit Name Reset Access Description
31:5 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
4:2 LOCATION 0x0 RW I/O Location
Decides the location of the CMU I/O pins.
Value Mode Description
0 LOC0 Location 0
1 LOC1 Location 1
2 LOC2 Location 2
1 CLKOUT1PEN 0 RW CLKOUT1 Pin Enable
When set, the CLKOUT1 pin is enabled.
0 CLKOUT0PEN 0 RW CLKOUT0 Pin Enable
When set, the CLKOUT0 pin is enabled.
11.5.28 CMU_LOCK - Configuration Lock Register
Offset Bit Position
0x084
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0000
Access
RW
Name
LOCKKEY
Bit Name Reset Access Description
31:16 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
15:0 LOCKKEY 0x0000 RW Configuration Lock Key
Write any other value than the unlock code to lock CMU_CTRL, CMU_HFCORECLKDIV,
CMU_HFPERCLKDIV, CMU_HFRCOCTRL, CMU_LFRCOCTRL, CMU_AUXHFRCOCTRL, CMU_OSCENCMD, CMU_CMD,
CMU_LFCLKSEL, CMU_HFCORECLKEN0, CMU_HFPERCLKEN0, CMU_LFACLKEN0, CMU_LFBCLKEN0, CMU_LFAPRESC0,