User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 156
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Bit Name Reset Access Description
4 PCNT2CLKEN 0 RW PCNT2 Clock Enable
This bit enables/disables the clock to the PCNT.
Value Description
0 PCNT2 is disabled
1 PCNT2 is enabled
3 PCNT1CLKSEL 0 RW PCNT1 Clock Select
This bit controls which clock that is used for the PCNT.
Value Mode Description
0 LFACLK LFACLK is clocking PCNT0
1 PCNT1S0 External pin PCNT1_S0 is clocking PCNT0
2 PCNT1CLKEN 0 RW PCNT1 Clock Enable
This bit enables/disables the clock to the PCNT.
Value Description
0 PCNT1 is disabled
1 PCNT1 is enabled
1 PCNT0CLKSEL 0 RW PCNT0 Clock Select
This bit controls which clock that is used for the PCNT.
Value Mode Description
0 LFACLK LFACLK is clocking PCNT0
1 PCNT0S0 External pin PCNT0_S0 is clocking PCNT0
0 PCNT0CLKEN 0 RW PCNT0 Clock Enable
This bit enables/disables the clock to the PCNT.
11.5.26 CMU_LCDCTRL - LCD Control Register
Offset Bit Position
0x07C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x2
0
0x0
Access
RW
RW
RW
Name
VBFDIV
VBOOSTEN
FDIV
Bit Name Reset Access Description
31:7 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
6:4 VBFDIV 0x2 RW Voltage Boost Frequency Division
These bits control the voltage boost update frequency division.
Value Mode Description
0 DIV1 Voltage Boost update Frequency = LFACLK
1 DIV2 Voltage Boost update Frequency = LFACLK/2
2 DIV4 Voltage Boost update Frequency = LFACLK/4
3 DIV8 Voltage Boost update Frequency = LFACLK/8
4 DIV16 Voltage Boost update Frequency = LFACLK/16
5 DIV32 Voltage Boost update Frequency = LFACLK/32
6 DIV64 Voltage Boost update Frequency = LFACLK/64
7 DIV128 Voltage Boost update Frequency = LFACLK/128
3 VBOOSTEN 0 RW Voltage Boost Enable