User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 155
www.energymicro.com
11.5.24 CMU_LFBPRESC0 - Low Frequency B Prescaler Register 0 (Async
Reg)
Offset Bit Position
0x070
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0
0x0
Access
RW
RW
Name
LEUART1
LEUART0
Bit Name Reset Access Description
31:6 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
5:4 LEUART1 0x0 RW Low Energy UART 1 Prescaler
Configure Low Energy UART 1 prescaler
Value Mode Description
0 DIV1 LFBCLK
LEUART1
= LFBCLK
1 DIV2 LFBCLK
LEUART1
= LFBCLK/2
2 DIV4 LFBCLK
LEUART1
= LFBCLK/4
3 DIV8 LFBCLK
LEUART1
= LFBCLK/8
3:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1:0 LEUART0 0x0 RW Low Energy UART 0 Prescaler
Configure Low Energy UART 0 prescaler
Value Mode Description
0 DIV1 LFBCLK
LEUART0
= LFBCLK
1 DIV2 LFBCLK
LEUART0
= LFBCLK/2
2 DIV4 LFBCLK
LEUART0
= LFBCLK/4
3 DIV8 LFBCLK
LEUART0
= LFBCLK/8
11.5.25 CMU_PCNTCTRL - PCNT Control Register
Offset Bit Position
0x078
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
Access
RW
RW
RW
RW
RW
RW
Name
PCNT2CLKSEL
PCNT2CLKEN
PCNT1CLKSEL
PCNT1CLKEN
PCNT0CLKSEL
PCNT0CLKEN
Bit Name Reset Access Description
31:6 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
5 PCNT2CLKSEL 0 RW PCNT2 Clock Select
This bit controls which clock that is used for the PCNT.
Value Mode Description
0 LFACLK LFACLK is clocking PCNT2
1 PCNT2S0 External pin PCNT2_S0 is clocking PCNT0