User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 145
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11.5.11 CMU_LFCLKSEL - Low Frequency Clock Select Register
Offset Bit Position
0x028
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0x1
0x1
Access
RW
RW
RW
RW
Name
LFBE
LFAE
LFB
LFA
Bit Name Reset Access Description
31:21 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
20 LFBE 0 RW Clock Select for LFB Extended
This bit redefines the meaning of the LFB field.
Value Mode Description
0 DISABLED LFBCLK is disabled (when LFB = DISABLED)
1 ULFRCO ULFRCO selected as LFBCLK (when LFB = DISABLED)
19:17 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
16 LFAE 0 RW Clock Select for LFA Extended
This bit redefines the meaning of the LFA field.
Value Mode Description
0 DISABLED LFACLK is disabled (when LFA = DISABLED)
1 ULFRCO ULFRCO selected as LFACLK (when LFA = DISABLED)
15:4 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
3:2 LFB 0x1 RW Clock Select for LFB
Selects the clock source for LFBCLK
LFB LFBE Mode Description
0 0 Disabled LFBCLK is disabled
1 0 LFRCO LFRCO selected as LFBCLK
2 0 LFXO LFXO selected as LFBCLK
3 0 HFCORECLKLEDIV2 HFCORECLK
LE
divided by two is selected as
LFBCLK
0 1 ULFRCO ULFRCO selected as LFBCLK
1:0 LFA 0x1 RW Clock Select for LFA
Selects the clock source for LFACLK.
LFA LFAE Mode Description
0 0 Disabled LFACLK is disabled
1 0 LFRCO LFRCO selected as LFACLK
2 0 LFXO LFXO selected as LFACLK
3 0 HFCORECLKLEDIV2 HFCORECLK
LE
divided by two is selected as
LFACLK
0 1 ULFRCO ULFRCO selected as LFACLK