User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 103
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9.4 Register Map
The offset register address is relative to the registers base address.
Offset Name Type Description
0x000 RMU_CTRL RW Control Register
0x004 RMU_RSTCAUSE R Reset Cause Register
0x008 RMU_CMD W1 Command Register
9.5 Register Description
9.5.1 RMU_CTRL - Control Register
Offset Bit Position
0x000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
1 0
Access
RW RW
Name
BURSTEN
LOCKUPRDIS
Bit Name Reset Access Description
31:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1 BURSTEN 1 RW Backup domain reset enable.
0 LOCKUPRDIS 0 RW Lockup Reset Disable
Set this bit to disable the LOCKUP signal(from the Cortex-M3) from resetting the device.
9.5.2 RMU_RSTCAUSE - Reset Cause Register
Offset Bit Position
0x004
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access
R R R R R R R R R R R R R R R R
Name
BUMODERST
BUBODREG
BUBODUNREG BUBODBUVIN
BUBODVDDDREG
BODAVDD1 BODAVDD0 EM4WURST
EM4RST
SYSREQRST LOCKUPRST
WDOGRST
EXTRST
BODREGRST
BODUNREGRST
PORST
Bit Name Reset Access Description
31:16 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
15 BUMODERST 0 R Backup mode reset
Set if the system has been in Backup mode. Must be cleared by software. Please see Section 10.3.4 (p. 112) for details on how
to interpret this bit.
14 BUBODREG 0 R Backup Brown Out Detector Regulated Domain
Set if the Backup BOD sensing on regulated power triggers. Must be cleared by software. Please see Section 10.3.4.2 (p. 113)
for details on how to interpret this bit.
13 BUBODUNREG 0 R Backup Brown Out Detector Unregulated Domain