Specifications

C8051F330/1

72 Rev. 1.1

CJNE @Ri, #data, rel Compare immediate to indirect and jump if not equal 3 4/5

DJNZ Rn, rel Decrement Register and jump if not zero 2 2/3

DJNZ direct, rel Decrement direct byte and jump if not zero 3 3/4

NOP No operation 1 1

Table 9.1. CIP-51 Instruction Set Summary

Mnemonic Description Bytes

Clock

Cycles

Notes on Registers, Operands and Addressing Modes:

Rn - Register R0-R7 of the currently selected register bank.

@Ri - Data RAM location addressed indirectly through R0 or R1.

rel - 8-bit, signed (two’s complement) offset relative to the first byte of the following instruction. Used by SJMP

and all conditional jumps.

direct - 8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00-0x7F) or an

SFR (0x80-0xFF).

#data - 8-bit constant

#data16 - 16-bit constant

bit - Direct-accessed bit in Data RAM or SFR

addr11 - 11-bit destination address used by ACALL and AJMP. The destination must be within the same 2K-byte

page of program memory as the first byte of the following instruction.

addr16 - 16-bit destination address used by LCALL and LJMP. The destination may be anywhere within the 8K-

byte program memory space.

There is one unused opcode (0xA5) that performs the same function as NOP.