Specifications

C8051F330/1
Rev. 1.1 57
7. VOLTAGE REFERENCE (C8051F330 ONLY)
The Voltage reference MUX on C8051F330/1 devices is configurable to use an externally connected voltage refer-
ence, the internal reference voltage generator, or the VDD power supply voltage (see Figure 7.1). The REFSL bit in
the Reference Control register (REF0CN) selects the reference source. For an external source or the internal refer-
ence, REFSL should be set to ‘0’. To use VDD as the reference source, REFSL should be set to ‘1’.
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor, internal
oscillators, and Current DAC. This bit is forced to logic 1 when any of the aforementioned peripherals are enabled.
The bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register REF0CN; see
Figure 7.2 for
REF0CN register details. The electrical specifications for the voltage reference circuit are given in Table 7.1.
The internal voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference generator and
a gain-of-two output buffer amplifier. The internal voltage reference can be driven out on the VREF pin by setting the
REFBE bit in register REF0CN to a ‘1’ (see
Figure 7.2). The maximum load seen by the VREF pin must be less than
200 µA to GND. When using the internal voltage reference, bypass capacitors of 0.1 µF and 4.7 µF are recommended
from the VREF pin to GND. If the internal reference is not used, the REFBE bit should be cleared to ‘0’. Electrical
specifications for the internal voltage reference are given in
Table 7.1.
Important Note About the VREF Pin: Port pin P0.0 is used as the external VREF input and as an output for the
internal VREF. When using either an external voltage reference or the internal reference circuitry, P0.0 should be
configured as an analog pin, and skipped by the Digital Crossbar. To configure P0.0 as an analog pin, set to ‘0’ Bit0 in
register P0MDIN. To configure the Crossbar to skip P0.0, set Bit 0 in register P0SKIP to ‘1’. Refer to
Section
“14. Port Input/Output” on page 113 for complete Port I/O configuration details. The TEMPE bit in register
REF0CN enables/disables the temperature sensor. While disabled, the temperature sensor defaults to a high imped-
ance state and any ADC0 measurements performed on the sensor result in meaningless data.
VREF
(to ADC)
To Analog Mux
VDD
VREF
R1
VDD
External
Voltage
Reference
Circuit
GND
Temp Sensor
EN
Bias Generator
To ADC, IDAC,
Internal Oscillators
EN
IOSCEN
0
1
REF0CN
REFSL
TEMPE
BIASE
REFBE
REFBE
Internal
Reference
EN
Figure 7.1. Voltage Reference Functional Block Diagram