Specifications

C8051F330/1
Rev. 1.1 185
19. PROGRAMMABLE COUNTER ARRAY
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU interven-
tion than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer and three 16-bit
capture/compare modules. Each capture/compare module has its own associated I/O line (CEXn) which is routed
through the Crossbar to Port I/O when enabled (See
Section “14.1. Priority Crossbar Decoder” on page 115 for
details on configuring the Crossbar). The counter/timer is driven by a programmable timebase that can select between
six sources: system clock, system clock divided by four, system clock divided by twelve, the external oscillator clock
source divided by 8, Timer 0 overflow, or an external clock signal on the ECI input pin. Each capture/compare mod
-
ule may be configured to operate independently in one of six modes: Edge-Triggered Capture, Software Timer, High-
Speed Output, Frequency Output, 8-Bit PWM, or 16-Bit PWM (each mode is described in
Section
“19.2. Capture/Compare Modules” on page 187). The external oscillator clock option is ideal for real-time clock
(RTC) functionality, allowing the PCA to be clocked by a precision external oscillator while the internal oscillator
drives the system clock. The PCA is configured and controlled through the system controller's Special Function Reg
-
isters. The PCA block diagram is shown in Figure 19.1
Important Note: The PCA Module 2 may be used as a watchdog timer (WDT), and is enabled in this mode follow-
ing a system reset. Access to certain PCA registers is restricted while WDT mode is enabled. See Section 19.3 for
details.
Figure 19.1. PCA Block Diagram
Capture/Compare
Module 1
Capture/Compare
Module 0
Capture/Compare
Module 2 / WDT
CEX1
ECI
Crossbar
CEX2 CEX0
Port I/O
16-Bit Counter/Timer
PCA
CLOCK
MUX
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8