Specifications

C8051F330/1
174 Rev. 1.1
Figure 18.5. TMOD: Timer Mode Register
Bit7: GATE1: Timer 1 Gate Control.
0: Timer 1 enabled when TR1 = 1 irrespective of /INT1 logic level.
1: Timer 1 enabled only when TR1 = 1 AND /INT1 is active as defined by bit IN1PL in register
INT01CF (see Figure 8.13).
Bit6: C/T1: Counter/Timer 1 Select.
0: Timer Function: Timer 1 incremented by clock defined by T1M bit (CKCON.4).
1: Counter Function: Timer 1 incremented by high-to-low transitions on external input pin (T1).
Bits5-4: T1M1-T1M0: Timer 1 Mode Select.
These bits select the Timer 1 operation mode.
Bit3: GATE0: Timer 0 Gate Control.
0: Timer 0 enabled when TR0 = 1 irrespective of /INT0 logic level.
1: Timer 0 enabled only when TR0 = 1 AND /INT0 is active as defined by bit IN0PL in register
INT01CF (see Figure 8.13).
Bit2: C/T0: Counter/Timer Select.
0: Timer Function: Timer 0 incremented by clock defined by T0M bit (CKCON.3).
1: Counter Function: Timer 0 incremented by high-to-low transitions on external input pin (T0).
Bits1-0: T0M1-T0M0: Timer 0 Mode Select.
These bits select the Timer 0 operation mode.
R/W R/W R/W R/W R/W R/W R/W R/W Reset Value
GATE1 C/T1 T1M1 T1M0 GATE0 C/T0 T0M1 T0M0 00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Address:
0x89
T1M1 T1M0 Mode
0 0 Mode 0: 13-bit counter/timer
0 1 Mode 1: 16-bit counter/timer
1 0 Mode 2: 8-bit counter/timer with auto-reload
1 1 Mode 3: Timer 1 inactive
T0M1 T0M0 Mode
0 0 Mode 0: 13-bit counter/timer
0 1 Mode 1: 16-bit counter/timer
1 0 Mode 2: 8-bit counter/timer with auto-reload
1 1 Mode 3: Two 8-bit counter/timers