Datasheet

Si5351A/B/C-B
8 Rev. 1.0
Table 7. Crystal Requirements
1,2
Parameter Symbol Min Typ Max Unit
Crystal Frequency f
XTAL
25 — 27 MHz
Load Capacitance C
L
6—12pF
Equivalent Series Resistance r
ESR
——150
Crystal Max Drive Level d
L
100 — — µW
Notes:
1. Crystals which require load capacitances of 6, 8, or 10 pF should use the device’s internal load capacitance for
optimum performance. See register 183 bits 7:6. A crystal with a 12 pF load capacitance requirement should use a
combination of the internal 10 pF load capacitance in addition to external 2 pF load capacitance (e.g., by using 4 pF
capacitors on XA and XB).
2. Refer to “AN551: Crystal Selection Guide” for more details.
Table 8. I
2
C Specifications (SCL,SDA)
1
Parameter Symbol Test Condition Standard Mode
100 kbps
Fast Mode
400 kbps
Unit
Min Max Min Max
LOW Level
Input Voltage
V
ILI2C
–0.5
0.3 x V
DDI2
C
–0.5 0.3 x V
DDI2C
2
V
HIGH Level
Input Voltage
V
IHI2C
0.7 x V
DDI2
C
3.6 0.7 x V
DDI2C
2
3.6 V
Hysteresis of
Schmitt Trigger
Inputs
V
HYS
—— 0.1 —V
LOW Level
Output Voltage
(open drain or
open collector)
at 3 mA Sink
Current
V
OLI2C
2
V
DDI2C
2
= 2.5/3.3 V 0 0.4 0 0.4 V
Input Current I
II2C
–10 10 –10 10 µA
Capacitance for
Each I/O Pin
C
II2C
V
IN
= –0.1 to V
DDI2C
—4 — 4pF
I
2
C Bus
Timeout
T
TO
Timeout Enabled 25 35 25 35 ms
Notes:
1. Refer to NXP’s UM10204 I
2
C-bus specification and user manual, revision 03, for further details, go to:
www.nxp.com/acrobat_download/usermanuals/UM10204_3.pdf.
2. Only I
2
C pullup voltages (VDDI2C) of 2.25 to 3.63 V are supported.