Datasheet

Si5351A/B/C-B
Rev. 1.0 21
5.5. Replacing Crystals, Crystal Oscillators, and PLLs
The Si5351C generates synchronous clocks for applications that require a fully integrated PLL instead of a VCXO.
Because of its dual PLL architecture, the Si5351C is capable of generating both synchronous and free-running
clocks. An example is shown in Figure 15.
Figure 15. Using the Si5351C to Replace Crystals, Crystal Oscillators, and PLLs
5.6. Applying a Reference Clock at XTAL Input
The Si5351 can be driven with a clock signal through the XA input pin. This is especially useful when in need of
generating clock outputs in two synchronization domains. With the Si5351C, one reference clock can be provided
at the CLKIN pin and at XA.
Figure 16. Si5351 Driven by a Clock Signal
Ethernet
PHY
USB
Controller
HDMI
Port
28.322 MHz
48 MHz
125 MHz
Video/Audio
Processor
74.25/1.001 MHz
24.576 MHz
OSC
XA
XB
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
PLL
PLL
Multi
Synth
0
Multi
Synth
1
Multi
Synth
2
74.25 MHz
CLKIN
25 MHz
Si5351C
Multi
Synth
3
Multi
Synth
4
Multi
Synth
5
54 MHz
Free-running
Clocks
Synchronous
Clocks
Multi
Synth
N
Multi
Synth
0
Multi
Synth
1
PLLB
PLLA
XA
XB
OSC
V
IN
= 1 V
PP
25/27 MHz
Note: Float the XB input while driving
the XA input with a clock
0.1 µF