User guide

Si471x-EVB
24 Preliminary Rev. 0.4
Digital DFS
Inversion Enable
Select whether the DFS Frame Clock is normal or inverted
On/Off
Digital DFS
Late Mode
Select PCM digital audio data between I
2
S or Left Justified
On: Left-Justified,
Off: I
2
S
Digital DFS
Pulse Mode
Select between using a regular 50% duty cycle Frame Clock, or a Pulse
Frame Clock
On/Off
Digital DCLK
Falling Edge
Select between using rising edge or falling edge of DCLK when sampling
Digital Input (DIN) data
On/Off
Table 4. Si471x Digital Property Window Explanations (Continued)
Item Explanation Range