Specifications

Si2493
8 Rev. 1.3
Figure 2. SPI Slave Timing
Read Cycle Time t
RC
120 — — ns
Write to Read Cycle Time t
WRC
120 — — ns
Serial Peripheral Interface (SPI) Timing Parameters
SS Falling to First SCLK Edge t
SE
41 — —
ns
Last SCLK Edge to SS Rising t
SD
41 — —
ns
SS Rising to MISO High-Z t
SDZ
——93
ns
SCLK High Time t
CKH
102 — —
ns
SCLK Low Time t
CKL
102 — —
ns
MOSI Valid to SCLK Sample Edge t
SIS
41 — —
ns
SCLK Sample Edge to MOSI Change t
SIH
41 — —
ns
SCLK Shift Edge to MISO Change t
SOH
——93
ns
SCLK cycle time t
SCK
224 — —
ns
Inactive time between SS actives t
NSS_INACT
81
—
—
ns
Table 6. Switching Characteristics
1
(Continued)
(V
D
= 3.0 to 3.6 V, T
A
= 0 to 70 °C for F-grade, T
A
= –40 to 85 °C for G-grade)
Parameter Symbol Min Typ Max Unit
Notes:
1. All timing is referenced to the 50% level of the waveform. Input test levels are V
IH
=V
D
– 0.4 V, V
IL
=0.4V.
2. With 32.768 kHz clocking, allow 500 to the reset low-to-high minimum pulse on power-up and wake-from-power-down
conditions.
SCLK*
T
SE
SS
T
CKH
T
CKL
MOSI
T
SIS
T
SIH
MISO
T
SD
T
SOH
T
SEZ
T
SDZ