Specifications

AN93
Rev. 0.9 103
Bit 2 (ESC) is a read/write bit that is functionally
equivalent to the ESC pin in the serial mode. The
operation of this bit, like the ESC pin, is enabled by
setting U70[15] (HES) = 1
b
.
Bit 1 (RTS
) is a read/write bit that functions in the
parallel mode like the RTS
pin (Si2493/57/34/15/04,
pin 8) in the serial mode.
The operation of RTS
and CTS is analogous to that in
the serial mode and must be enabled with AT\Q3. Bit 0
(CTS
) is a read-only bit that functions in the parallel
mode like the CTS
pin (Si2493/57/34/15/04, pin 11) in
the serial mode.
Table 74. Parallel Interface Register 1
Bit Name Function
7RXFReceive FIFO Almost Full (status).
6TXETransmit FIFO Almost Empty (status).
5REMReceive FIFO Empty.
4INTMInterrupt Mask.
0 = INT pin triggered on rising edge of RXF or TXE only.
1 = INT pin triggered on rising edge of RXF, TXE or INT (bit 3 below).
3INTInterrupt.
0 = No interrupt.
1 = Interrupt triggered.
2 ESC Escape.
1RTS
Request-to-Send.
0CTS
Clear-to-Send.