Specifications

AN93
54 Rev. 0.8
command, and the U-Registers from 0x0000 to 0x0079
in the main memory space, accessed via the AT:Raa
(register read) and the AT:Uaa (register write)
commands (where aa is the two digit hexadecimal
address of the register) and the external EEPROM.
These memory locations allow the modem to be
configured for a wide variety of functions and
applications and for global operation.
Firmware Upgrades
The Si2493/57/34/15/04 contains an on-chip Program
ROM that includes the firmware required for the
features listed in the data sheet. Additionally, the
Si2493/57/34/15/04 contains on-chip Program RAM to
accommodate minor changes to ROM firmware. This
allows Silicon Labs to provide future firmware updates
to optimize the characteristics of new modem designs
and those already deployed in the field.
The firmware upgrade, provided by Silicon Labs, is a file
loaded into the Si2493/57/34/15/04 Program RAM after
a reset using the AT:P command (see Table 20). Once
loaded, the upgrade status can be read using the ATI1
command to verify the firmware revision number. The
entire firmware upgrade in RAM is always cleared on a
reset. To reload the file after a reset or powerdown, the
host processor rewrites the file using the AT:P command
during post-reset initialization.
A CRC can be run on the upgrade file loaded into on-
chip Program RAM with the AT&T6 command to verify
that the upgrade was correctly written to the on-chip
memory. The CRC value obtained from executing the
AT&T6 command should match the CRC value provided
with the upgrade code.
The following memory notation conventions are
followed in this document:
 Single variable U-Registers are identified in this
document as the register type (i.e., U) followed by
the last two digits of the register’s hexadecimal
address and finally the register “name” in
parenthesis. Example: U4A(RGFD). Once the full
register reference is made, continuing discussion
refers to the register name to simplify the text. The
address and value of a single variable U-Register
are always read from or written to the Si2493/57/34/
15/04 in hexadecimal.
 Bit-mapped U-Registers are identified in this
document at the top level as the register type (i.e.,
U) followed by the last two digits of the register’s
hexadecimal address and finally the register “name”
in parenthesis. Example: U67 (ITC1). Once the full
register reference is made, continuing discussion of
the register at the top level refers to the register
name to simplify the text. The address and value of a
bit-mapped U-Register is always read from or written
to the Si2493/57/34/15/04 in hexadecimal.
 Bits within bit-mapped registers are identified in this
document as the register type (i.e., U) followed by
the last two digits of the register’s hexadecimal
address, the bit or bit range within the register in
brackets, and finally the bit or bit range “name” in
parenthesis. Example: U67[6](OHS) or
U67[3:2](DCT). Once the full register reference is
made, continuing discussion of the bits or bit range
refers to the bit or bit range name to simplify the text.
The bit or bit range inside the bracket represents the
actual bit or bit range within the register. The value of
a bit or bit range is presented in binary for clarity.
However, the address and value of a bit-mapped U-
Register is always read from or written to the Si2493/
57/34/15/04 in hexadecimal.
 Si2493/57/34/15/04 S-Registers are identified with a
decimal address (e.g., S38) and the number stored
in an S-Register is also a decimal value.
EEPROM Interface
The ISOmodem chipset supports an optional serial
peripheral interface (SPI) bus EEPROM. The EEPROM
must support SPI mode 3 with a 16-bit (8 kbit – 64 kbit
range) address. Upon powerup, if a pulldown resistor
<
10 kΩ is placed between D6 (Si2493/57/34/15/04, pin
4) and GND, the Si2493/57/34/15/04 attempts to detect
an EEPROM. The modem looks for a carriage return in
the first 10 memory locations. If none is found
(unprogrammed EEPROM), the modem stops reading
the EEPROM. An installed EEPROM may contain
custom default settings, firmware upgrades, and/or
user-defined AT command macros for use in custom AT
commands or country codes.
Once the EEPROM is detected, customer defaults that
are programmed into the EEPROM between the
optional heading "BOOT" and the "<CR><CR>"
delimiter execute immediately, and AT command
macros are loaded into on-chip RAM. The memory that
may be allocated to the <commands> portion of the
EEPROM is limited to 1000 bytes.
Firmware upgrades may also be automatically loaded
into the Si2493/57/34/15/04 using the BOOT format.
Note that three <CR>’s must be the last three entries in
the EEPROM.
The Si2493/57/34/15/04 includes a simple three-wire
interface that may be directly connected to serial SPI
EEPROMs that are available from several different
manufacturers.
For example:
25LC080—25LC640 Microchip