User's Manual

Silicon Laboratories Finland Oy
Page 37 of 45
11 Reset
WT41u may be reset from several sources: RESET pin, power on reset, a UART break character or via
software configured watchdog timer. The RESET pin is an active low reset and is internally filtered using the
internal low frequency clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESETB
being active. It is recommended that RESET be applied for a period greater than 5ms.
The power on reset occurs when the VDD_CORE supply internally to the module falls below typically 1.5V
and is released when VDD_CORE rises above typically 1.6V. At reset the digital I/O pins are set to inputs for
bidirectional pins and outputs are tri-state.
The reset should be held active at power up until all the supply voltages have stabilized to ensure correct
operation of the internal flash memory. Following figure shows an example of a simple power up reset circuit.
Time constant of the RC circuitry is set so that the supply voltage is safely stabilized before the reset
deactivates.
Figure 24: Example of a simple power on reset circuit.