User's Manual

26
 Fast Charge - Constant Voltage: entered when the battery has reached V
float
, the
charger switches mode to maintain the cell voltage at V
float
voltage by adjusting the
constant charge current.
 Standby: this is the state when the battery is fully charged and no charging takes
place.
When a voltage is applied to the charger input terminal VDD_CHG, and the battery is not fully charged,
the charger will operate and a LED connected to the terminal LED0 will illuminate. By default, until the
firmware is running, the LED will pulse at a low-duty cycle to minimize current consumption.
The battery charger circuitry auto-detects the presence of a power source, allowing the firmware to
detect, using an internal status bit, when the charger is powered. Therefore, when the charger supply is
not connected to VDD_CHG, the terminal must be left open circuit. The VDD_CHG pin, when not
connected, must be allowed to float and not be pulled to a power rail. When the battery charger is not
enabled, this pin may float to a low undefined voltage. Any DC connection will increase current
consumption of the device. Capacitive components such as diodes, FETs, and ESD protection, may be
connected.
The battery charger is designed to operate with a permanently connected battery. If the application
permits the charger input to be connected while the battery is disconnected, the VDD_BAT pin voltage
may become unstable. This, in turn, may cause damage to the internal switch-mode regulator.
Connecting a 470μF capacitor to VDD_BAT limits these oscillations thus preventing damage.
WARNING:
Use good consideration for battery safety. Do not charge with too much current. Do
not charge when the temperature is above 60°C or below 0°C. WT32 is initially
calibrated to stop charging when battery voltage is at 4.2 V. Do not try to charge
batteries above 4.2 V. Do not short circuit the battery or discharge below 1.5 V.
5.4 RESET
WT32 may be reset from several sources: reset pin, power on reset, a UART break character or through
software configured watchdog timer.
The power on reset occurs when the VDD_CORE supply falls below typically 1.26V and is released
when VDD_CORE rises above typically 1.31V. At reset, the digital I/O pins are set to inputs for bi-
directional pins and outputs are tri-state. The pull-down state is shown in Table 9.
The chip status after a reset is as follows:
 Warm Reset: data rate and RAM data remain available
 Cold Reset(10): data rate and RAM data are not available
Table 9 shows the pin states of WT32 on reset. Pull-up (PU) and pull-down (PD) default to weak values
unless specified otherwise.
Pin Name /
Group
I/O Type
State on Reset
USB_D+
Digital bi-directional
N/A
USB_D-
Digital bi-directional
N/A
UART_RX
Digital input with PD
PD
UART_CTS
Digital input with PD
PD
UART_TX
Digital bi-directional with PU
PU
UART_RTS
Digital bi-directional with PU
PU
SPI_MOSI
Digital input with PD
PD
SPI_CLK
Digital input with PD
PD
SPI_CS#
Digital input with PU
PU
SPI_MISO
Digital tri-state output with PD
PD
PCM_IN
Digital input with PD
PD
PCM_CLK
Digital bi-directional with PD
PD