User's Manual

Silicon Laboratories Finland Oy
Page 43 of 51
11 Reset
WT11u may be reset from several sources: RESET pin, power on reset, a UART break character or via software
configured watchdog timer. The RESET pin is an active high reset and is internally filtered using the internal low
frequency clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESETB being active. It
is recommended that RESET be applied for a period greater than 5ms.
The power on reset occurs when the VDD_CORE supply internally to the module falls below typically 1.5V and
is released when VDD_CORE rises above typically 1.6V. At reset the digital I/O pins are set to inputs for
bidirectional pins and outputs are tri-state.
WT11u has an internal power on reset circuit which holds the module in reset until all the supply voltages have
stabilized. The reset pin must be either floating or connected to high impedance during power on in order for
the power on reset circuit to work properly. If the reset pin is not connected to high impedance during power on,
then one must ensure that the reset is kept active until all the supply voltages have stabilized to prevent the
flash memory getting corrupted.