WT11u DATA SHEET Monday, 21 November 2016 Version 0.9.
VERSION HISTORY Version Comment 0.8 Initial versions 0.81 Ordering information updated 0.9 Reformatted tables, many WT11i->WT11u updates 0.9.1 Rest of tables reformatted 0.9.
TABLE OF CONTENTS 1 Ordering Information......................................................................................................................................6 2 Pinout and Terminal Description ...................................................................................................................7 3 Electrical Characteristics ............................................................................................................................ 10 4 3.
9.6 Slots and Sample Formats .................................................................................................................. 37 9.7 Additional Features ............................................................................................................................. 38 9.8 PCM_CLK and PCM_SYNC Generation ............................................................................................ 38 9.9 PCM Configuration ...................................................
WT11u Bluetooth® Module DESCRIPTION WT11u is a fully integrated Bluetooth 2.1 + EDR, class 1 module combining antenna, Bluetooth radio and an on-board iWRAP Bluetooth stack. Silicon Labs WT11u provides an ideal solution for developers that want to quickly integrate long range and high performance Bluetooth wireless technology to their design without investing several months into Bluetooth radio and stack development. WT11u provides a 100dB link budget ensuring long rage and robust Bluetooth connectivity.
1 Ordering Information Firmware U.FL Connector Internal chip antenna iWRAP 5.6 firmware, reel WT11u-E-AI56 WT11u-A-AI56 iWRAP 5.5 firmware, reel WT11u-E-AI55 WT11u-A-AI55 HCI firmware, BT2.1 + EDR, reel WT11u-E-HCI21001 WT11u-A-HCI21001 iWRAP 5.6 firmware with iAP, reel WT11u-E-AI56IAP WT11u-A-AI56IAP iWRAP 5.6 firmware, cut reel WT11u-E-AI56C WT11u-A-AI56C iWRAP 5.5 firmware, cut reel WT11u-E-AI55C WT11u-A-AI55C HCI firmware, BT2.
Pinout and Terminal Description 2 WT11i 1 GND 2 VDD_PA GND 28 AIO 3 27 PIO2 UART_TX 26 4 PIO3 PIO5 25 5 UART_RTS# SPI_MOSI 24 6 UART_RX SPI_MISO 23 7 PCM_OUT SPI_CLK 22 8 USB+ SPI_CS# 21 9 USB- PIO4 20 10 UART_CTS# PIO7 19 11 PCM_IN PIO6 18 12 PCM_CLK RESET 17 13 PCM_SYNC VDD 16 14 GND GND 15 Figure 1: WT11u connection diagram Pad name Pad number Pad type Description RESET 17 Input Reset input, active high, internal 220kohm pull-down.
PIO signal Pad number Description PIO[2] 3 Bi-directional digital in/out with programmable strength and pull-up/pulldown PIO[3] 4 Bi-directional digital in/out with programmable strength and pull-up/pulldown PIO[4] 20 Bi-directional digital in/out with programmable strength and pull-up/pulldown PIO[5] 25 Bi-directional digital in/out with programmable strength and pull-up/pulldown PIO[6] 18 Bi-directional digital in/out with programmable strength and pull-up/pulldown PIO[7] 19 Bi-directi
UART signal Pad number Pad type Description UART_TX 26 Output, pull-up weak internal UART data output, active high UART_RTS# 5 Output, pull-up weak internal UART request to send, active low UART_RX 6 Input, weak internal pulldown UART data input, active high UART_CTS# 10 Input, weak internal pulldown UART clear to send, active low Table 5: UART Terminal Descriptions USB signal Pad number Pad type Description USB+ 8 Bidirectional USB data line with internal 1.
3 Electrical Characteristics 3.1 Absolute Maximum Ratings Specification Min Max Unit Storage temperature -40 85 °C VDD_PA, VDD -0.4 3.6 V VSS-0.4 VDD+0.4 V Specification Min Max Unit Operating temperature -40 85 °C VDD_PA*, VDD 3.0 3.6 V Other terminal voltages Table 8: Absolute Maximum Ratings 3.2 Recommended Operating Conditions *) VDD_PA has an effect on the RF output power.
3.3 Input / Output Terminal Characteristics 3.3.1 Input/Output Terminal Characteristics (Digital) Digital Terminals Min Typ Max Unit 2.7 V ≤ VDD ≤ 3.0 V -0.4 - 0.8 V 1.7 V ≤ VDD ≤ 1.9 V -0.4 - 0.4 V 0.7 VDD - VDD + 0.4 V - - 0.2 V - - 0.4 V VOL output logic level high (IO = 4.0 mA) 2.7V ≤ VDD ≤ 3.0 VDD - 0.2 - V VOL output logic level high (IO = 4.0 mA) 1.7V ≤ VDD ≤ 1.9 VDD - 0.4 - V -100 -40 -10 µA 10 40 100 µA Weak pull-up -5.0 -1.0 -0.
3.3.2 Input/Output Terminal Characteristics (USB) USB Terminals Min VDD_USB for correct USB operation 3.1 Typ Max Unit 3.6 V Input Threshold VIL input logic level log VIH input logic level high - - 0.3VDD_USB V 0.
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3.5 Transmitter Performance For BDR RF characteristic Min Typ Max Bluetooth specification Unit Max transmit power 16 17 18.
Characteristic, VDD=3.3V, room temperature Packet type Typ Bluetooth specification Unit DH1 TBD -70 dBm DH5 -85 dBm 2-DH1 TBD dBm 2-DH5 TBD dBm 3-DH1 TBD dBm 3-DH5 TBD dBm TBD dBm Sensitivity for 0.1% BER Sensitivity variation over temperature range 3.
3.8 WT11u-A Antenna Specification WT11u-A uses a monopole type on a chip antenna with maximum gain of 0.5 dBi. The radiation pattern and the total radiated efficiency are dependent on the layout and any metal around the antenna has an effect on the radiation characteristics. Typically the efficiency is 30 … 50%.
Figure 6: Antenna radiation pattern in a USB dongle layout WT11i Figure 7: Antenna radiation pattern in the WT11 evaluation kit Figure 8: Antenna radiation pattern in the WT11 evaluation kit Silicon Laboratories Finland Oy Page 17 of 51
Figure 9: Antenna radiation pattern in the WT11 evaluation kit Silicon Laboratories Finland Oy Page 18 of 51
4 Physical Dimensions Figure 10: Physical dimensions (top view) Figure 11: Dimensions of WT11u-A Silicon Laboratories Finland Oy Page 19 of 51
Figure 12: Dimensions of WT11u-E Silicon Laboratories Finland Oy Page 20 of 51
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Figure 14: WT11u orientation in the reel Silicon Laboratories Finland Oy Page 22 of 51
5 Layout Guidelines WT11u is pin compatible with WT11i and WT11, despite slightly different external dimensions compared to WT11. For a new design it recommended to follow the land pattern shown in the figure below. Figure 15: Recommended PCB land pattern for WT11u Do not place any copper under the antenna. The minimum recommended keep out area is shown in the Figure 16.
Edge of the PCB Do not place copper or any metal within the area marked with cross lines GND area with stitching vias Figure 16: Recommended metal keep put area for WT11u Effect of PCB thickness to the antenna impedance matching 0 -5 S11 (dB) -10 1 mm 2 mm 3 mm BT Band -15 -20 -25 -30 -35 -40 2300 2350 2400 2450 2500 2550 2600 Freq (MHz) Figure 17: Effect of FR4 under the antenna to the resonant frequency Use good layout practices to avoid excessive noise coupling to supply voltage traces or s
– Make sure that the bias trace does not cross separated GND regions (D AGND) so that the path for the return current is cut. If this is not possibl not separate GND regions but keep one solid GND plane. – Keep the trace as short as possible A good practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to supply voltage planes and traces and route all the signals on top and bottom layers of the PCB.
6 UART Interface This is a standard UART interface for communicating with other serial devices.WT11u UART interface provides a simple mechanism for communicating with other serial devices using the RS232 protocol. Four signals are used to implement the UART function. When WT11u is connected to another digital device, UART_RX and UART_TX transfer data between the two devices.
Equation 1: Data Rate Data rate [bits/s] Persistent store value (Hex) Error [bits/s] Error [%] 1200 0x0005 5 1.73 2400 0x000A 10 1.73 4800 0x0014 20 1.73 9600 0x0027 39 -0.82 19200 0x004F 79 0.45 38400 0x009D 157 -0.18 57600 0x00EC 236 0.03 76800 0x013B 315 0.14 115200 0x01D8 472 0.03 230400 0x03B0 944 0.03 460800 0x075F 1887 -0.02 921600 0x0EBF 3775 0 1382400 0x161E 5662 -0.
6.1 UART Bypass Figure 21: UART Bypass Architecture 6.2 UART Configuration While Reset is Active The UART interface for WT11u while the chip is being held in reset is tristate. This will allow the user to daisy chain devices onto the physical UART bus. The constraint on this method is that any devices connected to this bus must tristate when WT11u reset is de-asserted and the firmware begins to run. 6.
7 USB Interface This is a full speed (12Mbits/s) USB interface for communicating with other compatible digital devices. WT11u acts as a USB peripheral, responding to requests from a master host controller such as a PC. The USB interface is capable of driving a USB cable directly. No external USB transceiver is required. The device operates as a USB peripheral, responding to requests from a master host controller such as a PC. Both the OHCI and the UHCI standards are supported.
Figure 22: USB Connections for Self-Powered Mode The terminal marked USB_ON can be any free PIO pin. The PIO pin selected must be registered by setting PSKEY_USB_PIO_VBUS to the corresponding pin number. Identifier Value Function Rs 0-10Ω as needed by the design ** Impedance matching to USB cable Rvb1 22kΩ 5% VBUS ON sense divider Rvb2 47kΩ 5% VBUS ON sense divider Figure 23: USB Interface Component Values **) WT11u has internal 22 ohm series resistors at the USB lines. 7.
Figure 24: USB Connections for Bus-Powered Mode 7.6 USB Suspend Current All USB devices must permit the USB controller to place them in a USB suspend mode. While in USB Suspend, bus-powered devices must not draw more than 2.5mA from USB VBUS (self-powered devices may draw more than 2.5mA from their own supply). This current draw requirement prevents operation of the radio by buspowered devices during USB Suspend.
Figure 25: USB_Detach and USB_Wake_Up Signals 7.8 USB Driver A USB Bluetooth device driver is required to provide a software interface between the chipset and the Bluetooth software running on the host computer. 7.9 USB v2.0 Compliance and Compatibility Although WT11u meets the USB specification, Silicon Labs cannot guarantee that an application circuit designed around the module is USB compliant.
8 Serial Peripheral Interface (SPI) The SPI port can be used for system debugging. It can also be used for programming the Flash memory and setting the PSKEY configurations. WT11u uses 16-bit data and 16-bit address serial peripheral interface, where transactions may occur when the internal processor is running or is stopped. SPI interface is connected using the MOSI, MISO, CSB and CLK pins. SPI interface cannot be used for application purposes.
9 PCM Codec Interface PCM is a standard method used to digitize audio (particularly voice) for transmission over digital communication channels. Through its PCM interface, WT11u has hardware support for continual transmission and reception of PCM data, thus reducing processor overhead for wireless headset applications. WT11u offers a bidirectional digital audio interface that routes directly into the baseband layer of the on-chip firmware. It does not pass through the HCI protocol layer.
Figure 27: PCM Interface Slave 9.2 Long Frame Sync Long Frame Sync is the name given to a clocking format that controls the transfer of PCM data words or samples. In Long Frame Sync, the rising edge of PCM_SYNC indicates the start of the PCM word. When WT11u is configured as PCM master, generating PCM_SYNC and PCM_CLK, then PCM_SYNC is 8-bits long. When WT11u is configured as PCM Slave, PCM_SYNC may be from two consecutive falling edges of PCM_CLK to half the PCM_SYNC rate, i.e., 62.5s long.
Figure 29: Short Frame Sync (Shown with 16-bit Sample) As with Long Frame Sync, WT11u samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising edge. PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK in the LSB position or on the rising edge. 9.4 Multi-slot Operation More than one SCO connection over the PCM interface is supported using multiple slots. Up to three SCO connections can be carried over any of the first four slots.
Figure 31: GCI Interface The start of frame is indicated by the rising edge of PCM_SYNC and runs at 8kHz. With WT11u in Slave mode, the frequency of PCM_CLK can be up to 4.096MHz. 9.6 Slots and Sample Formats WT11u can receive and transmit on any selection of the first four slots following each sync pulse. Slot durations can be either 8 or 16 clock cycles. Durations of 8 clock cycles may only be used with 8-bit sample formats. Durations of 16 clocks may be used with 8-bit, 13-bit or 16-bit sample formats.
Figure 32: 16-bit Slot Length and Sample Formats 9.7 Additional Features WT11u has a mute facility that forces PCM_OUT to be 0. In master mode, PCM_SYNC may also be forced to 0 while keeping PCM_CLK running which some codecs use to control power down. 9.8 PCM_CLK and PCM_SYNC Generation WT11u has two methods of generating PCM_CLK and PCM_SYNC in master mode. The first is generating these signals by DDS from the chipset internal 4MHz clock.
Equation 2: PCM_CLK Frequency When Being Generated Using the Internal 48MHz Clock The frequency of PCM_SYNC relative to PCM_CLK can be set using Equation XXX: Equation 3: PCM_SYNC Frequency Relative to PCM_CLK CNT_RATE, CNT_LIMIT and SYNC_LIMIT are set using PSKEY_PCM_LOW_JITTER_CONFIG. As an example, to generate PCM_CLK at 512kHz with PCM_SYNC at 8kHz, set PSKEY_PCM_LOW_JITTER_CONFIG to 0x08080177. 9.
Name Bit position Description - 0 Set to 0 SLAVE MODE EN 1 0 selects Master mode with internal generation of PCM_CLK and PCM_SYNC. 1 selects Slave mode requiring externally generated PCM_CLK and PCM_SYNC. This should be set to 1 if 48M_PCM_CLK_GEN_EN (bit 11) is set.
Name Bit position Description CNT LIMIT [12:0] Sets PCM_CLK counter limit CNT RATE [23:16] Sets PCM_CLK count rate SYNC LIMIT [31:24] Sets PCM_SYNC division relative to PCM_CLK Table 15: PSKEY_PCM_LOW_JITTER_CONFIG Description Silicon Laboratories Finland Oy Page 41 of 51
10 I/O Parallel Ports Six lines of programmable bidirectional input/outputs (I/O) are provided. All the PIO lines are power from VDD. PIO lines can be configured through software to have either weak or strong pull-ups or pull-downs. All PIO lines are configured as inputs with weak pull-downs at reset. Any of the PIO lines can be configured as interrupt request lines or as wake-up lines from sleep modes. WT11u has a general purpose analogue interface pin AIO[1].
11 Reset WT11u may be reset from several sources: RESET pin, power on reset, a UART break character or via software configured watchdog timer. The RESET pin is an active high reset and is internally filtered using the internal low frequency clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESETB being active. It is recommended that RESET be applied for a period greater than 5ms. The power on reset occurs when the VDD_CORE supply internally to the module falls below typically 1.
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12 Certifications The certifications for the WT11u are pending. 12.1 Bluetooth The WT11u module is Bluetooth qualified and listed as a controller subsystem and it is Bluetooth compliant to the following profiles of the core spec version 2.1/2.1+EDR. Baseband HCI Link Manager Radio The WT11u-E radio has been tested using an external antenna with a maximum gain of 2.3 dBi and the Bluetooth qualification is valid for any antenna with the same or less gain. 12.
The transmitter module must not be co-located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi-transmitter product procedures. As long as the two conditions above are met, further transmitter testing will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.).
The transmitter module must not be co-located or operating in conjunction with any other antenna or transmitter. As long as the two conditions above are met, further transmitter testing will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.).
Le module émetteur ne doit pas être installé au même endroit ou fonctionner conjointement avec toute autre antenne ou émetteur. Dès lors que les deux conditions ci-dessus sont respectées, d'autres tests de l'émetteur ne sont pas obligatoires.
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12.8 Qualified Antenna Types for WT11u-E This device has been designed to operate with a standard 2.14 dBi dipole antenna. Any antenna of a different type or with a gain higher than 2.14 dBi is strictly prohibited for use with this device. Using an antenna of a different type or gain more than 2.14 dBi will require additional testing for FCC, CE and IC. The required antenna impedance is 50 Ω. Antenna type Maximum gain Dipole 2.
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