User's Manual

Bluegiga Technologies Oy
Page 20 of 41
6 Example Application Schematic
Figure 9: An example application circuit with SDIO host connection, 3.3V level host logic and 1.5/1.8V
core supply, REGEN hard wired to the core supply and RST pad used to reset the module (Note: with
N-variant ANT-pad and associated grounds would also be connected)