User's Manual

Bluegiga Technologies Oy
Page 18 of 41
5 Power Control and Regulation
5.1 Power Control and Regulation
Figure 8: System block diagram
WF111 contains four linear regulators supplying clean voltages for the different parts of the system. All of
them produce a 1.2V output voltage, and are fed from a common input, VDD_REGIN. This input can be
supplied with a voltage between 1.45-2.0V, typically 1.5V or 1.8V. The VDD_REGIN supply should be
relatively clean of ripple and switching spikes in order to avoid degrading the RF performance.
WF111 also needs four other supply lines connected in addition to VDD_REGIN:
 VDD_PADS provides a reference voltage for matching voltage levels of the host system to the GPIO
pins used for Bluetooth coexistence and other functions. This can range from 1.7V to 3.6V. The
current drawn from this supply is negligible.
 VDD_SDIO provides a reference voltage for matching voltage levels of the host system to the SDIO
connection. This can range from 1.7V to 3.6V. The current drawn from this supply depends on bus
usage, but with no active data transfer will be negligible.
 VDD_ANA provides a reference voltage for communication between the Wi-Fi chip and the power
amplifier. This should be between 1.7V and 3.6V. The current drawn from this supply is negligible.
 VDD_PA is a separate supply voltage for the Wi-Fi power amplifier. This supply will draw considerable
currents in pulses. The power traces should be relatively wide. This voltage can range from 2.7V to
4.8V making use directly from a single lithium cell possible. A higher supply voltage will not affect the
power amplifiers current draw significantly. The regulator supplying VDD_PA should be capable of
reacting to load changes within 5µs. Note: VDD_PA has an internal 2.2µF ceramic bypass
capacitor, it should be made certain the regulator feeding VDD_PA is stable with ceramic load
capacitors.
These voltages are not tied to each other and any combination of supply voltages within the specified limits
can be used.