User's Manual

Bluegiga Technologies Oy

Page 13 of 41

 SD Specification Part E1 SDIO Specification v.1.10

4.1.3 CSR Serial Peripheral Interface (CSPI)

The CSPI is a host interface which shares pins with the SDIO. It contains a number of modifications on the

SDIO SPI specification aimed at increasing the host bus efficiency in hosts supporting SPI but not SDIO. The

main advantages compared to SDIO SPI are:

 Burst transfer is continuous instead of blocks with CRC

 Timings are deterministic (fixed number of clocks) reducing the required interaction

 16 bit registers are transferred as a single command instead of two 8 bit writes

MMU buffers are accessed using burst read/writes. The command and address fields are used to select the

correct buffer. The CSPI is able to generate an interrupt to the host when a memory access fails. This

interrupt line is shared with the SDIO functions.

The CSPI Interface is an extension of the basic SPI Interface, with the access type determined by the

following fields:

 8-bit command

 24-bit address

 16-bit burst length (optional). Only applicable for burst transfers into or out of the MMU

4.1.3.1 CSPI read/write cycles

Burst read/write cycles are used to access the MMU.

4.1.3.2 CSPI register write cycle

The command and address are locked into the slave, followed by 16bits of write data. An Error Byte is

returned on the MISO signal indicating whether or not the transfer has been successful.

Figure 3: CSPI Register Write Cycle

4.1.3.3 CSPI register read cycle

The command and address field are clocked into the slave, the slave then returns the following:

 Bytes of padding data (MISO held low)

 Error byte

 16-bits of read data