Data Sheet

Bluegiga – A Silicon Labs Company 11
3.2 GPIO pins
General purpose I/O pins and their functions are listed below.
PERIPHERAL
FUNCTION
GPIO NAME
PA7
PA6
PA5
PA4
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB12
PB13
PB14
PB15
PA13
PA14
RTS
PA12
CTS
PA11
RX
PA10
TX
PA9
PIN NUMBER
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
24
25
26
37
27
36
28
38
29
39
DEFAULT
FUNCTION **
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
RTS
CTS
RX
TX
5V TOLERANT
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
UART ***
RTS
CTS
RX
TX
SPI 1
Alt.1
MOSI
MISO
SCK
NSS*
Alt.2
NSS*
SCK
MISO
MOSI
SPI 2
Alt.1
NSS*
SCK
MISO
MOSI
Alt.2
NSS*
SCK
MISO
MOSI
I
2
C 1
Alt.1
SCL
SDA
Alt.2
SCL
SDA
I
2
C 2
Alt.1
Alt.2
SCL
SDA
DAC output
AO2
AO1
ADC input
AIN7
AIN6
AIN5
AIN4
Interrupt
channel
7
6
5
4
3
4
5
6
7
8
9
10
12
13
14
15
13
14
12
11
10
9
Table 2 General purpose I/O pins and their functions
* NSS signal is optional, see SPI description (Section 5.4 ) GPIO pins 36, 37, 38 and 39
** Default pin functions on production firmware / dc = disconnected, no need to pull up or down Reserved for production testing
*** UART can be used as a BGAPI™ host interface and DFU firmware updates Must be left unconnected
If the pins are set as GPIO rather than UART signals the DFU cannot work, see UART (Section 5.2 ) and recovery mode (Section 4.4 )
I2C 2 cannot be used in Alt. 2 configuration