Data Sheet

Bluegiga Technologies Oy
Page 46 of 52
 The number of layers required depends on the application. The simplest application with no high
speed signals connected, 2 layers might be enough, but with a high number of the APx4 signals in
use with high clock speeds, 6 layers is recommended, with solid power and ground planes.
 Place the peripherals (connectors etc.) as close as possible to APX4. One example is USB and
Ethernet. Make the lines as short as possible.
 USB lines: Use 45 ohms single-line (90 ohms differential) impedance. Route the lines as differential
pairs
 Ethernet lines: Use 50 ohms single-line (100 ohms differential) impedance. Route the lines as
differential pairs.
 Make sure that Ethernet Tx and Rx lines are well separated in order to minimize cross talk. If there is
excessive cross talk the PHY may receive its own packets.
 Be careful with clocks, e.g. SAIF0_MCLK. Do not route them longer than absolutely necessary. Place
the destination components as close as possible to the APx4. If clock traces are routed e.g. across
the board they easily cause radiation which may exceed allowed limits.
 The power supply should be designed for 5V and at least 500mA continuous current.
 We recommend issuing the motherboard design to Bluegiga for review in good time before ordering
the PCBs. Please allow for several days for such a review.