Data Sheet

Bluegiga Technologies Oy
Page 29 of 52
6.2 USB
Pin#
Function
Net name
27
USB OTG Host External VBUS enable
SPDIF*
29
USB Host D-
USB1_DM
31
USB Host D+
USB1_DP
33
USB OTG ID
USB0_ID
35
USB OTG D-
USB0_DM
37
USB OTG D+
USB0_DP
Table 34: USB pins
The module has two USB high-speed controllers, one which supports USB Host mode only and another which
support USB On-the-Go (OTG). The USB On-the-Go controller is capable of operating as a USB Host or a
USB Device and support the OTG role negotiation via the USB OTG-ID signal. For the current software
support, please see the software documentation.
The USB D+ and D- signals can be directly connected to a USB connector, however when using a connector,
protection against electrostatic discharge (ESD) should be taken into account.
Because USB high-speed is a very high frequency digital signal (480Mbps), care must be taken to route the
D+ and D- signals as close together as possible and to have a ground plane follow them. The traces must
also be kept as short as possible.
The USB Host External VBUS enable signal is not present in the standard model, and has a fixed pull-up.
For more details refer to the i.MX28 Applications Processor Reference Manual (MCIMX28RM) chapters 31
and 32.
6.3 I2C
Pin#
I
2
C function
Alternate Functions
Net name
40
I
2
C 0 Data
I2C0_SDA
41
I
2
C 0 Clock
I2C0_SCL
148
I
2
C 1 Data
PWM0, Debug UART TX
PWM0/I2C1_SDA
149
I
2
C 1 Clock
PWM1, Debug UART RX
PWM1/I2C1_SCL
Table 35: I
2
C interface
The Inter Integrated Circuit bus (I
2
C) is a standard two-wire interface used for communication between
peripherals and the host. The interface supports both standard speed (up to 100kbps) and as fast speed
(400kbps) I
2
C connection to multiple devices with the processor acting in either master or slave mode.