Data Sheet

Bluegiga Technologies Oy
Page 26 of 52
5.1.3 Bluetooth PCM slots and formats
The module receives and transmits on any selection of the first 4 slots following each sync pulse. Slot
durations are either 8 or 16 clock cycles:
 8 clock cycles for 8-bit sample formats.
 16 clocks cycles for 8-bit, 13-bit or 16-bit sample formats.
The supported formats are:
 13-bit linear, 16-bit linear and 8-bit μ-law or A-law sample formats.
 A sample rate of 8ksamples/s.
 Little or big endian bit order.
 For 16-bit slots, the 3 or 8 unused bits in each slot are filled with sign extension, padded with zeros or
a programmable 3-bit audio attenuation compatible with some codecs.
There is also a compatibility mode that forces PCM_OUT to be 0. In master mode, this allows for compatibility
with some codecs which control power down by forcing PCM_SYNC to 0 while keeping PCM_CLK running.
5.1.4 Bluetooth I2S interface
The I
2
S mode supports left-justified and right-justified data. The interface shares the same pins as the PCM
interface, which means each audio bus is mutually exclusive in its usage.
The digital audio interface is configured using the PSKEY_DIGITAL_AUDIO_CONFIG in the Bluetooth PS
Key configuration.
The internal representation of audio samples within CSR8811 is 16-bit and data on SD_OUT is limited to 16-
bit per channel.
Symbol
Parameter
Minimum
Maximum
Unit
-
SCK frequency
-
6.2
MHz
-
SCK frequency
-
96
kHz
t
ch
SCK high time
80
-
ns
t
cl
SCK low time
80
-
ns
t
ssu
WS valid to SCK high setup time
20
-
ns
t
sh
SCK high to WS invalid hold time
2.5
-
ns
t
opd
SCK low to SD_OUT valid delay time
-
20
ns
t
isu
SD_IN valid to SCK high setup time
20
-
ns
t
ih
SCK high to SD_IN invalid hold time
2.5
-
ns
Table 30: I
2
S Slave mode timing