APX4 – WIRELESS SYSTEM-ON-MODULE DATA SHEET Tuesday, 23 July 2013 Version 1.
Copyright © 2000-2013 Bluegiga Technologies All rights reserved. Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual. Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications detailed here at any time without notice and does not make any commitment to update the information contained here. Bluegiga’s products are not authorized for use as critical components in life support devices or systems.
VERSION HISTORY Version Comment 0.1 First draft 0.2 Defined screws and attachment to motherboard 0.3.1 Some small fixes and additions 0.3 TBDs defined 0.4 Review 0.4.1 Small fix to part number clarification 0.4.2 Updated document name, product description and contact information 0.4.3 Added Bluetooth RF specifications 0.5 Clarified pins etc. 0.6 Fixed layout. Removed software version from part number. 0.7 Styles updated and fixed Added notes about missing information 0.
TABLE OF CONTENTS 1 Ordering Information......................................................................................................................................7 1.1 2 3 4 APx4 pin descriptions ....................................................................................................................................8 2.1 Receptacle ............................................................................................................................................8 2.
6.12 7 JTAG .................................................................................................................................................. 37 Electrical Characteristics ............................................................................................................................ 39 7.1 Absolute Maximum Ratings................................................................................................................ 39 7.2 Recommended Operating Conditions .........
KEY FEATURES DESCRIPTION The Bluegiga APx4 is a small form factor, low power system-on-module that includes the latest wireless connectivity standards: 802.11 b/g/n and Bluetooth 4.0. APx4 is based on Freescale's i.MX28 processor family and runs an embedded Linux operating system based on TM the Yocto Project . In addition to integrating the 454MHz ARM9 processor, the wireless connectivity technologies, Linux operating system the APx4 also includes with several built in applications, such as the 802.
1 Ordering Information Product code CPU and memories Connectivity Antenna Temperature range APX4-367CC-A i.MX283 Bluetooth + Wi-Fi Internal antenna -10 – 50°C 64MB DDR2 128MB Flash 1.1 Part number decoder APX 4 – 3 6 7 C C – A Product category APX Product generation 4 Processor 3: i.MX283 Memory 6: 64MB Flash 7: 128MB Connectivity C: Bluetooth and Wi-Fi Temperature C: Commercial I: Industrial (contact sales@bluegiga.
2 APx4 pin descriptions The APX4 connector uses a standard DDR1 SO-DIMM connector with 2.5V keying. Odd numbered pins are located on top layer Even numbered pins are located on bottom layer There is a ½ pitch (0.3mm) offset from top layer pins to bottom layer pins. Note that most receptacles also have 0.3mm offset from odd pins to even pins. 2.1 Receptacle Suitable receptacles are available from multiple vendors.
2.4 SO-DIMM connection pin descriptions Note: Signals/nets marked with a star (*) are not present on standard version Pin# Default function Net name Note 1 5V input VIN 2 5V input VIN 3 5V input VIN 4 5V input VIN 5 Battery input/output VBATTERY 6 Battery input/output VBATTERY 7 Battery input/output VBATTERY 8 Bootmode BOOTMODE 9 3.3V output 3V3 Pins 9-10 may source up to 200mA combined. 10 3.3V output 3V3 Pins 9-10 may source up to 200mA combined. 11 3.
Pin# Default function Net name 19 Ethernet TX - ETN_TXN 20 GND GND 21 Ethernet TX + ETN_TXP 22 3.3V output 3V3 23 Ethernet RX - ETN_RXN 24 Ethernet LED ETN_LED1N* 25 Ethernet RX + ETN_RXP 26 GND GND Table 4: Ethernet * See 6.1 for detailed function.
Pin# Default function Net name 33 USB OTG id USB0_ID 34 35 NC USB D- USB0DM 36 37 NC USB D+ USB0DP 38 39 NC Ground GND Table 6: USB On-the-go Pin# Default function 40 I C Data 41 I C Clock Net name 2 I2C0_SDA 2 I2C0_SCL 2 Table 7: I C 0 Pin# Default function Net name 42 PWM (Backlight) PWM4 43 Status led PWM3 Table 8: Dedicated PWMs Bluegiga Technologies Oy Page 11 of 52
Pin# Default function Net name 44 Slave select 1 SDIO_DAT1_OUT* 45 Slave select 2 SDIO_DAT2_OUT* 46 Command - Master out, slave in SDIO_CMD_OUT* 47 Data 0, Master in, slave out SDIO_DAT0_OUT* 48 Clock SDIO_CLK_OUT* 49 Ready - Slave select 0 SDIO_DAT3_OUT* 50 Ground GND Table 9: SSP2 – SDIO/MMC/SPI Pin# Default function Net name 51 Card detect SSP0_DETECT 52 Data 0 SSP0_DATA0 53 Data 1 SSP0_DATA1 54 Data 2 SSP0_DATA2 55 Data 3 SSP0_DATA3 56 Command SSP0_CMD 57 Cl
Pin# Default function Net name 63 UART transmit SSP2_MOSI 64 UART receive SSP2_SCK 65 NC 66 NC Table 12: UART 2 Pin# Default function Net name 67 UART transmit SSP2_SS0 68 UART receive SSP2_MISO 69 NC 70 NC 71 Ground GND Table 13: UART 3 Pin# Default function Net name 72 Bluetooth GPIO BT_PIO7 73 Bluetooth GPIO BT_PIO8 74 Bluetooth GPIO BT_PIO9 75 Bluetooth GPIO BT_PIO25 Table 14: Bluetooth GPIO Bluegiga Technologies Oy Page 13 of 52
Pin# Default function Net name 76 CAN 0 transmit GPMI_RDY2* 77 Ground GND 78 CAN 1 transmit GPMI_CE2N* 79 CAN 1 receive GPMI_CE3* 80 Ground GND 81 CAN 0 receive GPMI_RDY3* 82 Ground GND Table 15: CAN Pin# Default function Net name 83 MCLK SAIF0_MCLK 84 Data line 1 SAIF1_SDATA0 85 Data line 0 SAIF0_SDATA0 86 Bit clock SAIF0_BITCLK 87 Left/Right clock SAIF0_LRCLK 88 GND GND Table 16: Primary audio / UART 4 Bluegiga Technologies Oy Page 14 of 52
Pin# Default function Net name 89 NC 90 NC 91 NC 92 NC 93 NC 94 Ground GND 95 NC 96 NC 97 NC 98 NC 99 NC 100 NC Table 17: Reserved group 1 Bluegiga Technologies Oy Page 15 of 52
Pin# Default function 101 102 Net name NC Ground GND 103 NC 104 NC 105 NC 106 NC 107 1.4V output* 1V4_CPU 108 1.8V output* 1V8 109 4.2V output* 4V2_CPU 110 NC 111 GND 112 NC 113 NC 114 NC 115 NC 116 Ground GND Table 18: Reserved group 2 *Important: Pins 107-109 are only meant for manufacturing test. Please leave unconnected. Do not pull any current from these outputs. Doing so may create a black hole in the universe.
Pin# Default function Net name 117 Data 0 LCD_D0 118 Data 1 LCD_D1 119 Data 2 LCD_D2 120 Data 3 LCD_D3 121 Data 4 LCD_D4 122 Data 5 LCD_D5 123 Data 6 LCD_D6 124 Data 7 LCD_D7 125 Data 8 LCD_D8 126 Data 9 LCD_D9 127 Data 10 LCD_D10 128 Data 11 LCD_D11 129 Ground GND 130 Data 12 LCD_D12 131 Data 13 LCD_D13 132 Data 14 LCD_D14 133 Data 15 LCD_D15 134 Data 16 LCD_D16 135 Data 17 LCD_D17 136 Data 18 LCD_D18 137 Data 19 LCD_D19 138 Data 20 LCD_D2
Table 19 LCD data lines Pin# Default function Net name 143 Horizontal Sync LCD_WR_RWN 144 Vertical Sync LCD_RD_E 145 LCD Enable LCD_CS 146 Dot clock LCD_RS 147 Ground GND Table 20: LCD control lines Pin# Function Net name 148 Debug UART RX or I2C1_SDA PWM0 (also connected to PTH pins on right side) 149 Debug UART TX or I2C1_SCL PWM1 (also connected to PTH pins on right side) 150 LCD reset / GPIO LCD_RESET 151 NC Table 21: Debug UART / PWM / I2C1 / GPIO Bluegiga Technologies O
Pin# Function Net name 152 NC 153 NC 154 NC 155 NC 156 NC 157 NC 158 NC 159 Ground GND 160 Ground GND 161 NC 162 NC 163 Ground GND 164 Ground GND 165 NC 166 NC 167 Ground GND 168 Ground GND 169 NC 170 WiFi Activity WIFI_ACT 171 Ground GND Table 22: Reserved group 3 Bluegiga Technologies Oy Page 19 of 52
Pin# Function Net name 172 Wi-Fi Debug SPI - MISO SPI_WIFI_MISO 173 Wi-Fi Debug SPI – CLK SPI_WIFI_CLK 174 Wi-Fi Debug SPI – MOSI SPI_WIFI_MOSI 175 Wi-Fi Debug SPI - CS SPI_WIFI_CS 176 RTC interrupt INT_EXT_RTC_N 177 Factory reset button / JTAG return clock JTAG_RTCK 178 JTAG test clock JTAG_TCK 179 JTAG test data in JTAG_TDI 180 JTAG test data out JTAG_TDO 181 JTAG test mode state JTAG_TMS 182 JTAG test reset JTAG_TRST 183 Ground GND 184 JTAG enable boundary scan DE
Pin # Function Net name 195 Bluetooth debug enable BT_SPI_PCM1N 196 PCM in BT_PCM1_IN 197 PCM out BT_PCM1_OUT 198 PCM clock BT_PCM1_CLK 199 PCM sync BT_PCM1_SYNC 200 Ground GND Table 25: Bluetooth audio Bluegiga Technologies Oy Page 21 of 52
3 Power subsystem Pin# Function APx4 net name Description 1-4 5V input VIN Main power input 5-7 Battery input/output VBATTERY A rechargeable connected 9-12, 22 3.3V output 3V3 For maximum current draw, see Table 50 13 RTC battery VBACKUP RTC battery backup power 14 Power switch PSWITCH_OUT Power switch 17 Reset in - Master reset RESETN Active low master reset. Resets the entire board. battery can be Table 26: Power supply pins The module is powered through the 5V input.
3.1 PSWITCH_OUT pin 14 Note: In most cases the user can ignore the PSWITCH pin. Leave unconnected for normal operation. The ÅSWITCH_OUT (pin 14) has three levels: low, mid and high. A 10kΩ pull-up to mid-level is applied on the module to the PSWITCH line, causing the device to start booting immediately once power is applied. Boot-up requires a mid-level voltage to be present for >100ms. If the PSWITCH is pulled high for over 5 seconds, for example by connecting it to 3.
4 Processor subsystem The processor belongs to the Freescale i.MX28-family and integrates an ARM9 core operating at 454MHz. The standard APX4 variant uses the i.MX283 processor. The module also has 128MB of SLC NAND flash and 64MB of DDR2-400 memory. For more details regarding the features the processor offers, please see the Freescale Reference Manual. By default the module boots from the NAND flash into the U-Boot boot loader environment.
5 Wireless interfaces The wireless connectivity on the module is implemented using two separate chips which share a 2.4GHz antenna. 5.1 Bluetooth The module is a fully qualified Bluetooth 4.0, Class 1, system, supporting both classical Bluetooth as well as Bluetooth Smart (Bluetooth low energy) devices simultaneously. 5.1.
5.1.3 Bluetooth PCM slots and formats The module receives and transmits on any selection of the first 4 slots following each sync pulse. Slot durations are either 8 or 16 clock cycles: 8 clock cycles for 8-bit sample formats. 16 clocks cycles for 8-bit, 13-bit or 16-bit sample formats. The supported formats are: 13-bit linear, 16-bit linear and 8-bit μ-law or A-law sample formats. A sample rate of 8ksamples/s. Little or big endian bit order.
Symbol Parameter Minimum Maximum Unit - SCK Frequency - 6.2 MHz - WS Frequency - 96 kHz tspd SCK low to WS valid delay time - 39.27 ns topd SCK low to SD_OUT valid delay time - 18.44 ns tisu SD_IN valid to SCK high setup time 18.44 - ns tih SCK high to SD_IN invalid hold time 0 - ns 2 Table 31: I S Master mode timing 5.2 Wi-Fi The on board Wi-Fi is designed for IEEE 802.11b/g/n in the 2.4GHz band.
6 Peripheral interfaces The module allows for several kinds of different interfaces to peripherals to be used. 6.1 Ethernet Pin# Function Net name 19 Ethernet TX - ETN_TXN 20 GND GND 21 Ethernet TX + ETN_TXP 22 3.3V output 3V3 23 Ethernet RX - ETN_RXN 24 Ethernet LED ETN_LED1N 25 Ethernet RX + ETN_RXP 26 GND GND Table 32: Ethernet pins The Ethernet I/O lines are connected on the module to a standard 10Base-T/100Base-TX physical layer transceiver (PHY).
6.2 USB Pin# Function Net name 27 USB OTG Host External VBUS enable SPDIF* 29 USB Host D- USB1_DM 31 USB Host D+ USB1_DP 33 USB OTG ID USB0_ID 35 USB OTG D- USB0_DM 37 USB OTG D+ USB0_DP Table 34: USB pins The module has two USB high-speed controllers, one which supports USB Host mode only and another which support USB On-the-Go (OTG). The USB On-the-Go controller is capable of operating as a USB Host or a USB Device and support the OTG role negotiation via the USB OTG-ID signal.
2 2 The primary I C interface (I C 0, pins 40 and 41) is also connected to the module’s Real Time Clock (RTC) chip and thus some additional restrictions for the communication apply. The processor is always the master. 2 The standard 2K pull-ups are located on APx4. Do not place additional pull-ups on I C 0.
6.5 SDIO / SPI / MMC Pin# SDIO/SD/MMC SPI mode Net name 51 Card detect 52 Data 0 53 Data 1 SSP0_DATA1 54 Data 2 SSP0_DATA2 55 Data 3 Slave Select SSP0_DATA3 56 Command MOSI SSP0_CMD 57 Clock Clock SSP0_SCK 58 Ground SSP0_DETECT MISO SSP0_DATA0 GND Table 37: SDIO/SPI/MMC The Synchronous Serial Port subsystem provides support for MMC cards, SD cards, SDIO devices, SPI master and slave communication and eMMC 4.4 devices.
6.6 UARTs The module can be configured to support up to five UARTs simultaneously, two with hardware flow control, two without hardware flow control and one for debugging. The UART interfaces offer similar functionality to the industry-standard 16C550 UART device, and the regular UARTs support baud rates of up to 3.25Mbits/s. For further information about UARTs 0, 2, 3 and 4, please refer to the i.MX28 Applications Processor Reference Manual, chapter 30. Debug UART is covered in chapter 24. 6.6.
6.6.4 UART 4 Pin# UART 4 Other functions Net name 61 Receive DUART RX, AUART 0 CTS AUART0_CTS 62 Transmit DUART TX, AUART 0 RTS AUART0_RTS 83 Clear-to-send SAIF0_MCLK, PWM 3 SAIF0_MCLK 85 Transmit SAIF0_SDATA0, PWM 6 SAIF0_SDATA0 86 Receive SAIF0_BITCLK, PWM 5 SAIF0_BITCLK 87 Request-to-send SAIF0_LRCLK, PWM 4 SAIF0_LRCLK Table 41: UART 4 The fourth UART is not available by default, but can be configured to be available from two different locations.
theory the Debug UART can be used for other UART applications instead of debugging, but it is primarily intended for simple console access to the processor. For further information, please refer to the i.MX28 Applications Processor Reference Manual, chapter 30. 6.
Each data line carries two channels of audio data, meaning that if SDATA0, SDATA1 and SDATA2 are all used, bi-directional 6 channel audio is possible. Please note that when the pins for UART 2 and UART 3 are used as audio data lines, they cannot be used as UARTs. Each function can be configured separately, so in case for example only one channel stereo is required, only the data line on pin 84 or 85 need to be used, allowing for the rest of the data lines to be used for other purposes.
Support for full 24-bit system mode (8080/6080/VSYNC/WSYNC). ITU-R/BT.656 compliant D1 digital video output mode with on-the-fly RGB to YCbCr color-spaceconversion. Support for a wide variety of input and output formats that allows for conversion between input and output (for example, RGB565 input to RGB888 output). For more information refer to the i.MX28 Applications Processor Reference Manual, chapter 33. 6.
6.11 HSADC (High-Speed ADC) Function Value Input sampling capacitance (Cs) 1.0pF typical Resolution 12 bits Maximum sampling rate 2MHz DC input voltage 0.5 — VDDA-0.5 Power-up time 1 sample cycles Table 48: HSADC The processor contains a high speed, high resolution analog to digital converter which can be used when the lower resolution ADCs do not provide enough sampling speed or resolution. For more information refer to refer to the i.MX28 Applications Processor Reference Manual. 6.
In case ARM debugging is needed the board must be powered on in JTAG mode ( Wait JTAG connection mode), i. e. LCD_D1 (pin 118) must be high.
7 Electrical Characteristics 7.1 Absolute Maximum Ratings Parameter Min Max Unit Vin -0.3 7.0 V Voltage on ordinary I/O -0.3 3.63 V 200 mA 0 70 °C -40 85 °C -40 85 °C 3V3 current drain* Permissible ambient temperature (Commercial version) Permissible ambient temperature (Industrial version) Storage temperature Table 50: Absolute Maximum ratings *Pins 9, 10, 11, 12 are 3.3V outputs intended for 3.3V low power devices.
7.3 Power Consumption Condition Min Typ Max Unit During Boot 1.0 1.2 1.3 W Idle 0.8 0.9 1.0 W 1.7 1.8 1.
8 RF Characteristics min max Channels 1 13 Frequency 2412 2472 (2462) (1-11 when used in USA) MHz Table 53: Supported frequencies for Wi-Fi transceiver min max Channels 0 78 Frequency 2402 2480 MHz Table 54: Supported frequencies for Bluetooth transceiver Standard Supported bit rates 802.11b 1, 2, 5.5, 11Mbps 802.11g 6, 9, 12, 18, 24, 36, 48, 54Mbps 802.11n, HT, 20MHz, 800ns 6.5, 13, 19.5, 26, 39, 52, 58.5, 65Mbps 802.11n, HT, 20MHz, 400ns 7.2, 14.4, 21.7, 28.9, 43.3, 57.
802.11b Typ 802.11g Typ 802.11n short GI Typ 802.11n long GI Typ 1 Mbps -97 dBm 6 Mbps -92 dBm 6.5 Mbps -91 dBm 7.2 Mbps -92 dBm 2 Mbps -95 dBm 9 Mbps -91 dBm 13 Mbps -87 dBm 14.4 Mbps -90 dBm 5.5 Mbps -93 dBm 12 Mbps -89 dBm 19.5 Mbps -85 dBm 21.7 Mbps -87 dBm 11 Mbps -89 dBm 18 Mbps -87 dBm 26 Mbps -82 dBm 28.9 Mbps -84 dBm 24 Mbps -84 dBm 39 Mbps -78 dBm 43.3 Mbps -80 dBm 36 Mbps -80 dBm 52 Mbps -74 dBm 57.8 Mbps -75 dBm 48 Mbps -75 dBm 58.
9 Physical Dimensions Figure 5: Physical dimensions Bluegiga Technologies Oy Page 43 of 52
10 Attachment to motherboard In order to ease assembly of the APx4 module, it has slightly oval attachment holes. The size of the hole is ~2.2x3.0mm. This makes it possible to attach a screw and nut to the motherboard before inserting the module. Parameter Size Note Diameter M2 Length <= 10mm, 8mm recommenced Head diameter <= 3.
11 Layout Guidelines Layout is very important for proper antenna operation when using the integrated antenna. 11.1 Internal antenna: Optimal module placement Key points to remember are APx4 should be placed so that the antenna faces away from large GND planes. Typically the best placement is along one of the motherboard edges.
The number of layers required depends on the application. The simplest application with no high speed signals connected, 2 layers might be enough, but with a high number of the APx4 signals in use with high clock speeds, 6 layers is recommended, with solid power and ground planes. Place the peripherals (connectors etc.) as close as possible to APX4. One example is USB and Ethernet. Make the lines as short as possible. USB lines: Use 45 ohms single-line (90 ohms differential) impedance.
12 Certifications APx4 is compliant to the following specifications: 12.1 CE TBD 12.2 FCC This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. FCC RF Radiation Exposure Statement: This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment.
The OEM of the APx4 Module must only use the approved antenna(s) described in Table 62 External Antenna Parameters, which have been certified with this module. The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product. 12.3 IC This device complies with Industry Canada license-exempt RSS standard(s).
The OEM of the APx4 Module must only use the approved antenna(s) described in Table 62 External Antenna Parameters, which have been certified with this module. The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product.
L’antenne (ou les antennes) doit être installée de façon à maintenir à tout instant une distance minimum de 20cm entre la source de radiation (l’antenne) et toute personne physique. Le module transmetteur ne doit pas être installé ou utilisé en concomitance avec une autre antenne ou un autre transmetteur. Tant que ces deux conditions sont réunies, il n’est pas nécessaire de procéder à des tests supplémentaires sur le transmetteur.
12.5 MIC, formerly TELEC TBD 12.6 Qualified Antenna Types for APx4-E This device has been designed to operate with a standard 2.14 dBi dipole antenna. Any antenna of a different type or with a gain higher than 2.14 dBi is strictly prohibited for use with this device. Using an antenna of a different type or gain more than 2.14 dBi will require additional testing for FCC, CE and IC. Please contact support@bluegiga.com for more information. The required antenna impedance is 50 ohms.
13 Contact Information Inquiries/ Support: www.bluegiga.com Head office, Finland Phone: +358-9-4355 060 Fax: +358-9-4355 0660 Bluegiga Technologies Oy Sinikalliontie 5A, 5th floor 02630 Espoo, FINLAND USA office Phone: +1 770 291 2181 Fax: +1 770 291 2183 Bluegiga Technologies, Inc. 3235 Satellite Boulevard, Building 400, Suite 300, Duluth, GA, 30096, USA Hong Kong office Phone: +852 3972 2186 Bluegiga Technologies Ltd.
