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C8051F50x/51x
6 Rev. 0.2
Figure 4. C8051F500 Target Board with Pin Numbers
P4
P5
C8051F500-TB
PWR
COMM
P1.3_A
P1.3_B
P1.4_B
P1.4_A
P1
Port 0 “A”
J1
Port 4 “A”
J5
Port 2 “A”
J3
Port 1 “A”
J2
Port 3 “A”
J4
+LIN_V
LIN_OUT
GND
DEBUG_A
P2
CAN_H
CAN_L
GND
R27
SIDE “A”
SIDE “B”
DEBUG_B
P3
TB3
RESET_A
RESET_B
J20
SILICON LABS
www.silabs.com
DS4
DS2
DS3
DS1
J14
J22
J19
J18
J21
J7
J10 J9
J24
J17
Port 0 “B”
J27
Port 2 “B”
J29
Port 1 “B”
J28
J11
F502
U2
C8051
F500
U1
J31
J32
J8
J26
U5
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
TB1
TB2
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