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C8051F35x-DK
6 Rev. 0.4
4.3. Expansion I/O Connector (J1)
The 34-pin Expansion I/O connector J1 provides access to all signal pins of the C8051F350 device. Pins for V
DD
and GND as well as pins for VDDA and AGND are also available. A small through-hole prototyping area is also
provided. All I/O signals routed to connector J1 are also routed to through-hole connection points between J1 and
the prototyping area (see Figure 3 on page 4). Each connection point is labeled indicating the signal available at
the connection point. See Table 2 for a list of pin descriptions for J1.
4.4. Target Board DEBUG Interface (J4)
The
DEBUG
connector (J4) provides access to the
DEBUG
(C2) pins of the C8051F350. It is used to connect the
Serial Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming.
Table 3 shows the
DEBUG
pin definitions.
4.5. Serial Interface (J5)
A RS232 transceiver circuit and DB-9 (J5) connector are provided on the target board to facilitate serial
connections to UART0 of the C8051F350. The TX, RX, RTS and CTS signals of UART0 may be connected to the
DB-9 connector and transceiver by installing shorting blocks on header J3.
J3[7–8] - Install shorting block to connect UART0 TX (P0.4) to transceiver.
J3[9–10] - Install shorting block to connect UART0 RX (P0.5) to transceiver.
J3[11–12] - Install shorting block to connect UART0 RTS (P1.4) to transceiver.
J3[13–14] - Install shorting block to connect UART0 CTS (P1.5) to transceiver.
Table 2. J1 Pin Descriptions
Pin # Description Pin # Description Pin # Description
1
V
DD
13 P1.2 25 AIN3
2 GND 14 P1.3 26 AIN4
3 P0.0 15 P1.4 27 AIN5
4 P0.1 16 P1.5 28 AIN6
5 P0.2 17 P1.6/IDAC0 29 AIN7
6 P0.3 18 P1.7/IDAC1 30 VREF+
7 P0.4 19 P2.0 31 /RST
8P0.5 20AGND 32VREF
9P0.6 21
AGND
33
VDDA
10 P0.7 22 AIN0 34 AGND
11 P1.0 23 AIN1 - -
P1.1 24 AIN2 - -
Table 3. DEBUG Connector Pin Descriptions
Pin # Description
1 +3VD (+3.3VDC)
2, 3, 9 GND (Ground)
4C2D
5/RST (Reset)
6P3.0
7C2CK
8 Not Connected
10 USB Power
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