Product Specs

Drawing No.：JW205100XX
Date：May 30, 2019
(32/58)
CONFIDENTIAL
© silex technology, Inc.
SDIO 信号の配線について (SDIO signal length)
SDIO 信号は SD_CLK を基準に外部回路等遅延配線としてください。
Skew of SDIO signal lines are recommended on the host board.
Signals
PCB
Difference from
SD_CLK signal
Units
SD_CLK
5.6581
0
mm
SD_CMD
4.1752
-1.483
mm
SD_DATA3
6.5884
+0.9303
mm
SD_DATA2
5.4256
-0.2325
mm
SD_DATA1
4.5592
-1.0989
mm
SD_DATA0
3.727
-1.9311
mm
表内の各数値はモジュール上での各信号配線長を、Diff from CLK の数値は SD_CLK との配線長差を示しています。Diff
from CLK の値が”+”の場合は SD_CLK より短く、”-”の場合は SD_CLK より長くホストボード上で配線することで等
遅等長配線となるようにしてください。
The value of tables means the length of SDIO signals on the module, and Diff from CLK means the difference
of each SD signal’s length from SD_CLK. “+” means the length of SD signal should be shorter from SD_CLK,
“-” means the length of SD signal should be longer from SD_CLK on your board to equate the length of SD
signals.